From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759561AbcIMRat (ORCPT ); Tue, 13 Sep 2016 13:30:49 -0400 Received: from mga01.intel.com ([192.55.52.88]:25281 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755434AbcIMRas (ORCPT ); Tue, 13 Sep 2016 13:30:48 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.30,329,1470726000"; d="scan'208";a="167741326" From: "Pan, Harry" To: "tglx@linutronix.de" CC: "hpa@zytor.com" , "linux-kernel@vger.kernel.org" , "peterz@infradead.org" , "srinivas.pandruvada@linux.intel.com" , "mingo@redhat.com" , "x86@kernel.org" , "bp@alien8.de" Subject: Re: [PATCH 3/3] perf/x86/rapl: Enable Baytrail/Braswell RAPL support Thread-Topic: [PATCH 3/3] perf/x86/rapl: Enable Baytrail/Braswell RAPL support Thread-Index: AQHSC+4zy0bUUfuFLEqDnpSo6U5kC6B26y8AgAA/8YA= Date: Tue, 13 Sep 2016 17:30:43 +0000 Message-ID: <1473787841.4582.13.camel@intel.com> References: <1473571099-1944-1-git-send-email-harry.pan@intel.com> <1473571099-1944-3-git-send-email-harry.pan@intel.com> In-Reply-To: Accept-Language: zh-TW, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.252.185.203] Content-Type: text/plain; charset="utf-8" Content-ID: <5472ABC6FB95FF4591B93515F245F065@intel.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by mail.home.local id u8DHUr0g024785 On Tue, 2016-09-13 at 15:41 +0200, Thomas Gleixner wrote: > On Sun, 11 Sep 2016, Harry Pan wrote: > > This patch also enables multiple quirks. > > This patch adds a single quirk for Baytrail. > > Please stop sending out patches 5 seconds after a review. Take your time Definitely I take this seriously because I felt awkward as well. > > + /* > > + * Some Atom processors (BYT/BSW) have 2^ESU microjoules > > + * increment, refer to Software Developers' Manual, Vol. 3C, > > + * Order No. 325384, Table 35-8 of MSR_RAPL_POWER_UNIT. > > + * > > + * TODO: In order to fit BYT/BSW quirk model, here remind > > + * this generates timer rate in 80ms; by default > > + * ESU of BYT/BSW is 5, so it leads (1000/200)*2^4. > > This sentence is not a sentence and I can't make any sense of it at > all. > > What's the TODO here? And why is that TODO not addressed in this patch? > I reviewed my sentence and agreed your comment; yes, it is incorrect to be a "TODO" tag since no decent suggestion/option. This things is because of the Baytrail/Braswell quirk breaks original assumption of perf RAPL polling timer rate calculation regarding of counter overflow case based on 200W; in short, it leads every 80ms system triggers an event to read counters, and this is concern I want to comment (wrong tag?) because I could no assess any side effect. Perhaps I should revise it as "remark" or "caveat" because I do not have decent suggestion (fulfill "TODO" tag) so far. Alternately, it shall not affect functionality since I compared w/ powercap driver through sysfs nodes during experiment, yet I am humble to take any advice to make this patch better. Sincerely, Harry