From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756008AbcIUJGi (ORCPT ); Wed, 21 Sep 2016 05:06:38 -0400 Received: from gate.crashing.org ([63.228.1.57]:48214 "EHLO gate.crashing.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753281AbcIUJGf (ORCPT ); Wed, 21 Sep 2016 05:06:35 -0400 Message-ID: <1474448633.2857.119.camel@kernel.crashing.org> Subject: Re: [PATCH net-next 6/7] net/faraday: Fix phy link irq on Aspeed G5 SoCs From: Benjamin Herrenschmidt To: Joel Stanley , Andrew Lunn Cc: davem@davemloft.net, Gavin Shan , Andrew Jeffery , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Date: Wed, 21 Sep 2016 19:03:53 +1000 In-Reply-To: References: <20160920063007.24291-1-joel@jms.id.au> <20160920063007.24291-7-joel@jms.id.au> <1474373594.2857.62.camel@kernel.crashing.org> <20160920152940.GI22292@lunn.ch> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.20.5 (3.20.5-1.fc24) Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 2016-09-21 at 11:32 +0930, Joel Stanley wrote: > I had a look at the eval board schematic and it appears that the line > has pull down resistors on it, explaining why the IRQ fires when it's > configured to active low. Other machines re-use the pin pin as a GPIO. > So yes, I will change this to a dt property in v2. That will mean > dropping 4/7 "net/faraday: Avoid PHYSTS_CHG interrupt" as well. What line is it out of the PHY ? The PHY IRQ ? If yes then it's meant to be telling you to go look at the PHY registers for a link status change, but only works if the PHY has also been configured appropriately... Mostly we ignore those things in Linux and just poll the PHY. Cheers, Ben.