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From: "Luc, Piotr" <Piotr.Luc@intel.com>
To: "kvm@vger.kernel.org" <kvm@vger.kernel.org>,
	"he.chen@linux.intel.com" <he.chen@linux.intel.com>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"tglx@linutronix.de" <tglx@linutronix.de>,
	"x86@kernel.org" <x86@kernel.org>,
	"hpa@zytor.com" <hpa@zytor.com>,
	"mingo@redhat.com" <mingo@redhat.com>,
	"pbonzini@redhat.com" <pbonzini@redhat.com>,
	"Kang, Luwei" <luwei.kang@intel.com>,
	"rkrcmar@redhat.com" <rkrcmar@redhat.com>
Subject: Re: [PATCH] x86/cpuid: expose AVX512_4VNNIW and AVX512_4FMAPS features to kvm guest
Date: Fri, 28 Oct 2016 10:13:01 +0000	[thread overview]
Message-ID: <1477649272.17668.7.camel@intel.com> (raw)
In-Reply-To: <1477645960-6898-1-git-send-email-he.chen@linux.intel.com>

On Fri, 2016-10-28 at 17:12 +0800, He Chen wrote:
> The spec can be found in Intel Software Developer Manual or in
> Instruction Set Extensions Programming Reference.
> 
> Signed-off-by: Luwei Kang <luwei.kang@intel.com>
> Signed-off-by: He Chen <he.chen@linux.intel.com>
> ---
>  arch/x86/kvm/cpuid.c | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
> index afa7bbb..328b169 100644
> --- a/arch/x86/kvm/cpuid.c
> +++ b/arch/x86/kvm/cpuid.c
> @@ -376,6 +376,10 @@ static inline int __do_cpuid_ent(struct
> kvm_cpuid_entry2 *entry, u32 function,
>  	/* cpuid 7.0.ecx*/
>  	const u32 kvm_cpuid_7_0_ecx_x86_features = F(PKU) | 0
> /*OSPKE*/;
>  
> +	/* cpuid 7.0.edx*/
> +	const u32 kvm_cpuid_7_0_edx_x86_features =
> +        0x4 /* AVX512-4VNNIW */ | 0x8 /* AVX512-4FMAPS */;
> +
>  	/* all calls to cpuid_count() should be made on the same cpu
> */
>  	get_cpu();
>  
> @@ -458,12 +462,13 @@ static inline int __do_cpuid_ent(struct
> kvm_cpuid_entry2 *entry, u32 function,
>  			/* PKU is not yet implemented for shadow
> paging. */
>  			if (!tdp_enabled)
>  				entry->ecx &= ~F(PKU);
> +            entry->edx &= kvm_cpuid_7_0_edx_x86_features;

The cpu_mask() is missed here.
I understand that it doesn't work for this scattered features but the
bits in edx must be zeroed if corresponding flags were cleared in
fpu__xstate_clear_all_cpu_caps.
So this implies more work unfortunately.

>  		} else {
>  			entry->ebx = 0;
>  			entry->ecx = 0;
> +            entry->edx = 0;
>  		}
>  		entry->eax = 0;
> -		entry->edx = 0;
>  		break;
>  	}
>  	case 9:

  parent reply	other threads:[~2016-10-28 10:13 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-10-28  9:12 [PATCH] x86/cpuid: expose AVX512_4VNNIW and AVX512_4FMAPS features to kvm guest He Chen
2016-10-28  9:31 ` Paolo Bonzini
2016-10-28  9:46   ` He Chen
2016-10-28  9:54     ` Paolo Bonzini
2016-10-28  9:55       ` He Chen
2016-10-28 10:13 ` Luc, Piotr [this message]
2016-10-28 10:17   ` Paolo Bonzini
2016-10-28 11:08     ` Borislav Petkov
2016-10-28 12:07       ` Paolo Bonzini
2016-10-28 12:21         ` Borislav Petkov
2016-10-29 12:21           ` Paolo Bonzini
2016-10-29 12:25             ` Borislav Petkov
2016-10-29 12:36               ` Paolo Bonzini
2016-10-29 12:53                 ` Borislav Petkov
2016-10-29 13:20                   ` Paolo Bonzini
2016-10-31  9:15             ` Luc, Piotr
2016-10-31  9:53               ` Borislav Petkov
2016-10-31 10:18                 ` Luc, Piotr
2016-10-31 10:30                   ` Borislav Petkov
2016-10-31 10:47                     ` Paolo Bonzini
2016-10-31 11:05                       ` Borislav Petkov
2016-10-31 11:41                         ` Paolo Bonzini
2016-11-01  7:48                           ` He Chen
2016-11-01  8:46                             ` Borislav Petkov

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