From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751351AbdAMIyh (ORCPT ); Fri, 13 Jan 2017 03:54:37 -0500 Received: from mailgw01.mediatek.com ([69.46.227.141]:57513 "EHLO mailgw01.mediatek.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751298AbdAMIye (ORCPT ); Fri, 13 Jan 2017 03:54:34 -0500 From: Erin Lo To: Matthias Brugger CC: , , , , , Leilk Liu , Erin Lo Subject: [PATCH v2 1/6] arm: dts: mt2701: Add spi device node Date: Fri, 13 Jan 2017 16:42:53 +0800 Message-ID: <1484296978-18572-2-git-send-email-erin.lo@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1484296978-18572-1-git-send-email-erin.lo@mediatek.com> References: <1484296978-18572-1-git-send-email-erin.lo@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Leilk Liu Add spi device node for MT2701. Signed-off-by: Leilk Liu Signed-off-by: Erin Lo --- arch/arm/boot/dts/mt2701-evb.dts | 50 ++++++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/mt2701.dtsi | 39 +++++++++++++++++++++++++++++++ 2 files changed, 89 insertions(+) diff --git a/arch/arm/boot/dts/mt2701-evb.dts b/arch/arm/boot/dts/mt2701-evb.dts index 082ca88..879f1eb 100644 --- a/arch/arm/boot/dts/mt2701-evb.dts +++ b/arch/arm/boot/dts/mt2701-evb.dts @@ -24,6 +24,56 @@ }; }; +&pio { + spi_pins_a: spi0@0 { + pins_spi { + pinmux = , + , + , + ; + bias-disable; + }; + }; + + spi_pins_b: spi1@0 { + pins_spi { + pinmux = , + , + , + ; + bias-disable; + }; + }; + + spi_pins_c: spi2@0 { + pins_spi { + pinmux = , + , + , + ; + bias-disable; + }; + }; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi_pins_a>; + status = "disabled"; +}; + +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spi_pins_b>; + status = "disabled"; +}; + +&spi2 { + pinctrl-names = "default"; + pinctrl-0 = <&spi_pins_c>; + status = "disabled"; +}; + &uart0 { status = "okay"; }; diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi index bdf8954..eb4c6fd 100644 --- a/arch/arm/boot/dts/mt2701.dtsi +++ b/arch/arm/boot/dts/mt2701.dtsi @@ -227,6 +227,45 @@ status = "disabled"; }; + spi0: spi@1100a000 { + compatible = "mediatek,mt2701-spi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0 0x1100a000 0 0x100>; + interrupts = ; + clocks = <&topckgen CLK_TOP_SYSPLL3_D2>, + <&topckgen CLK_TOP_SPI0_SEL>, + <&pericfg CLK_PERI_SPI0>; + clock-names = "parent-clk", "sel-clk", "spi-clk"; + status = "disabled"; + }; + + spi1: spi@11016000 { + compatible = "mediatek,mt2701-spi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0 0x11016000 0 0x100>; + interrupts = ; + clocks = <&topckgen CLK_TOP_SYSPLL3_D2>, + <&topckgen CLK_TOP_SPI1_SEL>, + <&pericfg CLK_PERI_SPI1>; + clock-names = "parent-clk", "sel-clk", "spi-clk"; + status = "disabled"; + }; + + spi2: spi@11017000 { + compatible = "mediatek,mt2701-spi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0 0x11017000 0 0x1000>; + interrupts = ; + clocks = <&topckgen CLK_TOP_SYSPLL3_D2>, + <&topckgen CLK_TOP_SPI2_SEL>, + <&pericfg CLK_PERI_SPI2>; + clock-names = "parent-clk", "sel-clk", "spi-clk"; + status = "disabled"; + }; + mmsys: syscon@14000000 { compatible = "mediatek,mt2701-mmsys", "syscon"; reg = <0 0x14000000 0 0x1000>; -- 1.9.1