From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752651AbdARKND (ORCPT ); Wed, 18 Jan 2017 05:13:03 -0500 Received: from mailout2.samsung.com ([203.254.224.25]:44119 "EHLO mailout2.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752358AbdARKMm (ORCPT ); Wed, 18 Jan 2017 05:12:42 -0500 X-AuditID: b6c32a59-f79c56d000006d2c-9e-587f3e9387ba From: Smitha T Murthy To: linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org Cc: kyungmin.park@samsung.com, kamil@wypas.org, jtp.park@samsung.com, a.hajda@samsung.com, mchehab@kernel.org, pankaj.dubey@samsung.com, krzk@kernel.org, m.szyprowski@samsung.com, s.nawrocki@samsung.com, Smitha T Murthy , Hans Verkuil , Wu-Cheng Li , Kieran Bingham , Vladimir Zapolskiy , Laurent Pinchart Subject: [PATCH 10/11] [media] v4l2: Add v4l2 control IDs for HEVC encoder Date: Wed, 18 Jan 2017 15:32:08 +0530 Message-id: <1484733729-25371-11-git-send-email-smitha.t@samsung.com> X-Mailer: git-send-email 1.7.2.3 In-reply-to: <1484733729-25371-1-git-send-email-smitha.t@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFuplk+LIzCtJLcpLzFFi42LZdlhTXXeyXX2EwZ+VWha31p1jtVjycxeT xZG1V5ksZp5oZ7XoWbyX0eL8+Q3sFmeb3rBbTGy6w2Kx6fE1VovLu+awWfRs2MpqsfbIXXaL ZZv+MFks2vqF3eLwG6C2u3u2MVr8/9XMbHGm+yyTg5DHotlPmDxmN1xk8ZjyeyOrx+yOmawe m1Z1snlsXlLv8W/hFBaPvi2rGD0+b5LzuHKkkT2AKyrVJiM1MSW1SCE1Lzk/JTMv3VbJOzje Od7UzMBQ19DSwlxJIS8xN9VWycUnQNctMwfoKyWFssScUqBQQGJxsZK+nU1RfmlJqkJGfnGJ rVK0oaGRnqGBuZ6RkZGeiVGslZEpUElCasb+U7+YC85FVjx80MXcwLjPu4uRk0NCwERi/8Ed 7BC2mMSFe+vZuhi5OIQEljJKzN7+gg0kISTQziQxe5MCTMPfjW8YIeLLGSXWNjNCNPxnlHj2 4DFYA5uAjsS396fBbBGBVIlX69ayghQxC1xklmhdc44FJCEs4CUxv2st2CQWAVWJjp2bmEFs XgFXiTlnf7BAbFOQeHVjLdh5nEDxiffusIAMkhB4yS7R9mAqUxcjB5AjK7HpADOE6SLxr9MP olVY4tXxLVCfSUv8XXqLEaK1mVFi7rZmqPkTGCVWtpZC2PYSB67MAYszC/BJ9P5+AjWeV6Kj TQiixEPi9dsZUDMdJZ78+8EOCYgZjBLb5sZPYJRZwMiwilEstaA4Nz212LTAVK84Mbe4NC9d Lzk/dxMjOClqRe5gvDIz6BCjAAejEg+v4a26CCHWxLLiytxDjBIczEoivPNt6yOEeFMSK6tS i/Lji0pzUosPMZoCQ2kis5Rocj4wYeeVxBuamBmaGFkamVkaGhspifMuqLCOEBJITyxJzU5N LUgtgulj4uCUamCcLVFutLP+TwYf9wYpq/b3tk7tJk7HLcLfmf6wlvmoXDVrscTPHbf/OP8+ +fxLsGrn2S0pXz5cTFztViBTmtwh3rfj7JuLbPFFPCF+G+94n9LQPn78yhxryYBit94n3xcv ftuju1Cmwf70Hc0zBzKuqf78ycQg9bYnZdFn1iUeMjsmlnIdiV6gxFKckWioxVxUnAgAu9ms 06ADAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrLIsWRmVeSWpSXmKPExsVy+t9jAd1JdvURBuuPiFrcWneO1WLJz11M FkfWXmWymHmindWiZ/FeRovz5zewW5xtesNuMbHpDovFpsfXWC0u75rDZtGzYSurxdojd9kt lm36w2SxaOsXdovDb4Da7u7Zxmjx/1czs8WZ7rNMDkIei2Y/YfKY3XCRxWPK742sHrM7ZrJ6 bFrVyeaxeUm9x7+FU1g8+rasYvT4vEnO48qRRvYArig3m4zUxJTUIoXUvOT8lMy8dFul0BA3 XQslhbzE3FRbpQhd35AgJYWyxJxSIM/IAA04OAe4Byvp2yW4Zew/9Yu54FxkxcMHXcwNjPu8 uxg5OSQETCT+bnzDCGGLSVy4t56ti5GLQ0hgKaPEpW3/2SGcRiaJXY8nMoNUsQnoSHx7f5oN xBYRSJVYu/U8K0gRs8BFZolX3z6DjRIW8JKY37UWzGYRUJXo2LkJrJlXwFViztkfLBDrFCRe 3VjLDmJzAsUn3rsDFhcScJGYdXQy4wRG3gWMDKsYJVILkguKk9JzjfJSy/WKE3OLS/PS9ZLz czcxgqPumfQOxsO73A8xCnAwKvHwBojWRQixJpYVV+YeYpTgYFYS4Z1vWx8hxJuSWFmVWpQf X1Sak1p8iNEU6LCJzFKiyfnAhJBXEm9oYm5ibmxgYW5paWKkJM7bOPtZuJBAemJJanZqakFq EUwfEwenVAMjt7GYJbfG23khZWlb2m6dZLy3qOOlutp5r9mMl+TDd82o73102Sv3m1oDb75+ Z4bEtBarFytPyaj9WP5obohMbpze8vLqtTG6ex/sODXRTm72uX9tC+ffme+gYJCTcvqfve/k c0v2Gze9WaV82D9D4PB8tebFAvOvHPrmW3+s1nHx02O9qg93KLEUZyQaajEXFScCALu37zzQ AgAA X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170118100818epcas5p1c7153a6fe9d93f96269008f42f736b90 X-Msg-Generator: CA X-Sender-IP: 203.254.230.27 X-Local-Sender: =?UTF-8?B?U21pdGhhIFQgTXVydGh5G1NTSVItVHVybiBLZXkgU29sdXRp?= =?UTF-8?B?b25zG+yCvOyEseyghOyekBtMZWFkIEVuZ2luZWVy?= X-Global-Sender: =?UTF-8?B?U21pdGhhIFQgTXVydGh5G1NTSVItVHVybiBLZXkgU29sdXRp?= =?UTF-8?B?b25zG1NhbXN1bmcgRWxlY3Ryb25pY3MbTGVhZCBFbmdpbmVlcg==?= X-Sender-Code: =?UTF-8?B?QzEwG1NXQUhRG0MxMElEMDdJRDAxMDk5Nw==?= CMS-TYPE: 105P DLP-Filter: Pass X-CFilter-Loop: Reflected X-HopCount: 7 X-CMS-RootMailID: 20170118100818epcas5p1c7153a6fe9d93f96269008f42f736b90 X-RootMTR: 20170118100818epcas5p1c7153a6fe9d93f96269008f42f736b90 References: <1484733729-25371-1-git-send-email-smitha.t@samsung.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add v4l2 controls for HEVC encoder CC: Hans Verkuil CC: Wu-Cheng Li CC: Kieran Bingham CC: Vladimir Zapolskiy CC: Laurent Pinchart Signed-off-by: Smitha T Murthy --- drivers/media/v4l2-core/v4l2-ctrls.c | 51 ++++++++++++++++ include/uapi/linux/v4l2-controls.h | 109 ++++++++++++++++++++++++++++++++++ 2 files changed, 160 insertions(+), 0 deletions(-) diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c index 47001e2..387439d 100644 --- a/drivers/media/v4l2-core/v4l2-ctrls.c +++ b/drivers/media/v4l2-core/v4l2-ctrls.c @@ -775,6 +775,57 @@ static bool is_new_manual(const struct v4l2_ctrl *master) case V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP: return "VPX P-Frame QP Value"; case V4L2_CID_MPEG_VIDEO_VPX_PROFILE: return "VPX Profile"; + /* HEVC controls */ + case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP: return "HEVC Frame QP value"; + case V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP: return "HEVC P frame QP value"; + case V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP: return "HEVC B frame QP value"; + case V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP: return "HEVC Minimum QP value"; + case V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP: return "HEVC Maximum QP value"; + case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK: return "HEVC dark region adaptive"; + case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH: return "HEVC smooth region adaptive"; + case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC: return "HEVC static region adaptive"; + case V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY: return "HEVC activity adaptive"; + case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE: return "HEVC Profile"; + case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL: return "HEVC level"; + case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG: return "HEVC tier_flag default is Main"; + case V4L2_CID_MPEG_VIDEO_HEVC_RC_FRAME_RATE: return "HEVC Frame rate"; + case V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH: return "HEVC Maximum coding unit depth"; + case V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES: return "HEVC Number of reference picture"; + case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE: return "HEVC refresh type"; + case V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED_ENABLE: return "HEVC constant intra prediction enabled"; + case V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU_ENABLE: return "HEVC lossless encoding select"; + case V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT_ENABLE: return "HEVC Wavefront enable"; + case V4L2_CID_MPEG_VIDEO_HEVC_LF_DISABLE: return "HEVC Filter disable"; + case V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY: return "across or not slice boundary"; + case V4L2_CID_MPEG_VIDEO_HEVC_LTR_ENABLE: return "long term reference enable"; + case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP_ENABLE: return "QP values for temporal layer"; + case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE: return "Hierarchical Coding Type"; + case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER:return "Hierarchical Coding Layer"; + case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP:return "Hierarchical Coding Layer QP"; + case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_BIT0:return "Hierarchical Coding Layer BIT0"; + case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_BIT1:return "Hierarchical Coding Layer BIT1"; + case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_BIT2:return "Hierarchical Coding Layer BIT2"; + case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_BIT3:return "Hierarchical Coding Layer BIT3"; + case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_BIT4:return "Hierarchical Coding Layer BIT4"; + case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_BIT5:return "Hierarchical Coding Layer BIT5"; + case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_BIT6:return "Hierarchical Coding Layer BIT6"; + case V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH:return "Hierarchical Coding Layer Change"; + case V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING: return "HEVC Sign data hiding"; + case V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB_ENABLE: return "HEVC General pb enable"; + case V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID_ENABLE: return "HEVC Temporal id enable"; + case V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOTHING_FLAG: return "HEVC Strong intra smoothing flag"; + case V4L2_CID_MPEG_VIDEO_HEVC_DISABLE_INTRA_PU_SPLIT: return "HEVC disable intra pu split"; + case V4L2_CID_MPEG_VIDEO_HEVC_DISABLE_TMV_PREDICTION: return "HEVC disable tmv prediction"; + case V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1: return "max number of candidate MVs"; + case V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE_ENABLE: return "ENC without startcode enable"; + case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD: return "HEVC Number of reference picture"; + case V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2: return "HEVC loop filter beta offset"; + case V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2: return "HEVC loop filter tc offset"; + case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD: return "HEVC size of length field"; + case V4L2_CID_MPEG_VIDEO_HEVC_USER_REF: return "user long term reference frame"; + case V4L2_CID_MPEG_VIDEO_HEVC_STORE_REF: return "store long term reference frame"; + case V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR: return "Prepend SPS/PPS to every IDR"; + /* CAMERA controls */ /* Keep the order of the 'case's the same as in v4l2-controls.h! */ case V4L2_CID_CAMERA_CLASS: return "Camera Controls"; diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h index 0d2e1e0..a2a1c5d 100644 --- a/include/uapi/linux/v4l2-controls.h +++ b/include/uapi/linux/v4l2-controls.h @@ -579,6 +579,115 @@ enum v4l2_vp8_golden_frame_sel { #define V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP (V4L2_CID_MPEG_BASE+510) #define V4L2_CID_MPEG_VIDEO_VPX_PROFILE (V4L2_CID_MPEG_BASE+511) +/* CIDs for HEVC encoding. Number gaps are for compatibility */ + +#define V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP \ + (V4L2_CID_MPEG_BASE + 512) +#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP \ + (V4L2_CID_MPEG_BASE + 513) +#define V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP \ + (V4L2_CID_MPEG_BASE + 514) +#define V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP \ + (V4L2_CID_MPEG_BASE + 515) +#define V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP \ + (V4L2_CID_MPEG_BASE + 516) +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_QP_ENABLE \ + (V4L2_CID_MPEG_BASE + 517) +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_TYPE \ + (V4L2_CID_MPEG_BASE + 518) +enum v4l2_mpeg_video_hevc_hier_coding_type { + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B = 0, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P = 1, +}; +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER \ + (V4L2_CID_MPEG_BASE + 519) +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_QP \ + (V4L2_CID_MPEG_BASE + 520) +#define V4L2_CID_MPEG_VIDEO_HEVC_PROFILE \ + (V4L2_CID_MPEG_BASE + 521) +#define V4L2_CID_MPEG_VIDEO_HEVC_LEVEL \ + (V4L2_CID_MPEG_BASE + 522) +#define V4L2_CID_MPEG_VIDEO_HEVC_RC_FRAME_RATE \ + (V4L2_CID_MPEG_BASE + 523) +#define V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG \ + (V4L2_CID_MPEG_BASE + 524) +#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH \ + (V4L2_CID_MPEG_BASE + 525) +#define V4L2_CID_MPEG_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES \ + (V4L2_CID_MPEG_BASE + 526) +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_DISABLE \ + (V4L2_CID_MPEG_BASE + 527) +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY \ + (V4L2_CID_MPEG_BASE + 528) +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2 \ + (V4L2_CID_MPEG_BASE + 529) +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2 \ + (V4L2_CID_MPEG_BASE + 530) +#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE \ + (V4L2_CID_MPEG_BASE + 531) +#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD \ + (V4L2_CID_MPEG_BASE + 532) +#define V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU_ENABLE \ + (V4L2_CID_MPEG_BASE + 533) +#define V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED_ENABLE \ + (V4L2_CID_MPEG_BASE + 534) +#define V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT_ENABLE \ + (V4L2_CID_MPEG_BASE + 535) +#define V4L2_CID_MPEG_VIDEO_HEVC_LTR_ENABLE \ + (V4L2_CID_MPEG_BASE + 536) +#define V4L2_CID_MPEG_VIDEO_HEVC_USER_REF \ + (V4L2_CID_MPEG_BASE + 537) +#define V4L2_CID_MPEG_VIDEO_HEVC_STORE_REF \ + (V4L2_CID_MPEG_BASE + 538) +#define V4L2_CID_MPEG_VIDEO_HEVC_SIGN_DATA_HIDING \ + (V4L2_CID_MPEG_BASE + 539) +#define V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB_ENABLE \ + (V4L2_CID_MPEG_BASE + 540) +#define V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID_ENABLE \ + (V4L2_CID_MPEG_BASE + 541) +#define V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOTHING_FLAG \ + (V4L2_CID_MPEG_BASE + 542) +#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1 \ + (V4L2_CID_MPEG_BASE + 543) +#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_DARK \ + (V4L2_CID_MPEG_BASE + 544) +#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_SMOOTH \ + (V4L2_CID_MPEG_BASE + 545) +#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_STATIC \ + (V4L2_CID_MPEG_BASE + 546) +#define V4L2_CID_MPEG_VIDEO_HEVC_ADAPTIVE_RC_ACTIVITY \ + (V4L2_CID_MPEG_BASE + 547) +#define V4L2_CID_MPEG_VIDEO_HEVC_DISABLE_INTRA_PU_SPLIT \ + (V4L2_CID_MPEG_BASE + 548) +#define V4L2_CID_MPEG_VIDEO_HEVC_DISABLE_TMV_PREDICTION \ + (V4L2_CID_MPEG_BASE + 549) +#define V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE_ENABLE \ + (V4L2_CID_MPEG_BASE + 550) +#define V4L2_CID_MPEG_VIDEO_HEVC_QP_INDEX_CR \ + (V4L2_CID_MPEG_BASE + 551) +#define V4L2_CID_MPEG_VIDEO_HEVC_QP_INDEX_CB \ + (V4L2_CID_MPEG_BASE + 552) +#define V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD \ + (V4L2_CID_MPEG_BASE + 553) +#define V4L2_CID_MPEG_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR \ + (V4L2_CID_MPEG_BASE + 554) +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_CH \ + (V4L2_CID_MPEG_BASE + 555) +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_BIT0 \ + (V4L2_CID_MPEG_BASE + 556) +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_BIT1 \ + (V4L2_CID_MPEG_BASE + 557) +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_BIT2 \ + (V4L2_CID_MPEG_BASE + 558) +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_BIT3 \ + (V4L2_CID_MPEG_BASE + 559) +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_BIT4 \ + (V4L2_CID_MPEG_BASE + 560) +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_BIT5 \ + (V4L2_CID_MPEG_BASE + 561) +#define V4L2_CID_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_LAYER_BIT6 \ + (V4L2_CID_MPEG_BASE + 562) + /* MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */ #define V4L2_CID_MPEG_CX2341X_BASE (V4L2_CTRL_CLASS_MPEG | 0x1000) #define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE (V4L2_CID_MPEG_CX2341X_BASE+0) -- 1.7.2.3