From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932801AbdBIVfN (ORCPT ); Thu, 9 Feb 2017 16:35:13 -0500 Received: from mga03.intel.com ([134.134.136.65]:27491 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754205AbdBIVex (ORCPT ); Thu, 9 Feb 2017 16:34:53 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.35,137,1484035200"; d="scan'208";a="1124473750" From: "De Marchi, Lucas" To: "mika.westerberg@linux.intel.com" , "andriy.shevchenko@linux.intel.com" , "jarkko.nikula@linux.intel.com" , "Nehal-Bakulchandra.Shah@amd.com" CC: "wsa@the-dreams.de" , "linux-kernel@vger.kernel.org" , "suravee.suthikulpanit@amd.com" , "linux-i2c@vger.kernel.org" , "Shyam-sundar.S-k@amd.com" Subject: Re: [PATCH] i2c: designware: Fix regression when dynamic TAR update is disabled Thread-Topic: [PATCH] i2c: designware: Fix regression when dynamic TAR update is disabled Thread-Index: AQHSgw4Agu9ZDUzn9EWqLGpf4p6fQ6FhoFIAgAAYKwA= Date: Thu, 9 Feb 2017 21:34:10 +0000 Message-ID: <1486676048.14478.4.camel@intel.com> References: <1486669851-25632-1-git-send-email-Nehal-Bakulchandra.Shah@amd.com> <1486670858.2133.436.camel@linux.intel.com> In-Reply-To: <1486670858.2133.436.camel@linux.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.24.10.217] Content-Type: text/plain; charset="utf-8" Content-ID: <64CE917AA3457243BB34F49A488CF2B1@intel.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by mail.home.local id v19LZeGc002144 On Thu, 2017-02-09 at 22:07 +0200, Andy Shevchenko wrote: > On Fri, 2017-02-10 at 01:20 +0530, Shah Nehal-Bakulchandra wrote: > > The following commit causes a regression when dynamic TAR update is > > disabled: > > > >      commit 63d0f0a6952a1a02bc4f116b7da7c7887e46efa3 ("i2c: > > designware: > >      detect when dynamic tar update is possible") > > Please, leave just 12 characters, it still enough. > > > In such case, the DW_IC_CON_10BITADDR_MASTER is R/W, and is changed > > by the logic that's trying to detect  dynamic TAR update.The original > > value of DW_IC_CON_10BITADDR_MASTER bit should be restored. You are right, thanks for the fix. This may also explains why 0317e6c (i2c: designware: do not disable adapter after transfer) caused problems and ended up being reverted. Could you try that on your hardware? The dynamic tar update detection was only done as preparation work to allow not disabling the adapter, which is reverted. We may also just revert this commit instead of fixing the logic. thanks Lucas De Marchi