From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753983AbdBVRLB (ORCPT ); Wed, 22 Feb 2017 12:11:01 -0500 Received: from mga07.intel.com ([134.134.136.100]:52553 "EHLO mga07.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932568AbdBVRKv (ORCPT ); Wed, 22 Feb 2017 12:10:51 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.35,195,1484035200"; d="scan'208";a="68342471" From: thor.thayer@linux.intel.com To: lee.jones@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, dinguyen@kernel.org, linux@armlinux.org.uk, p.zabel@pengutronix.de Cc: thor.thayer@linux.intel.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCHv2 0/5] Add Arria10 System Manager Reset Controller Date: Wed, 22 Feb 2017 11:10:14 -0600 Message-Id: <1487783419-10912-1-git-send-email-thor.thayer@linux.intel.com> X-Mailer: git-send-email 1.9.1 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Thor Thayer This series of patches adds the Altera Arria10 Development Kit System Resource Chip's Reset Controller. Thor Thayer (5): dt-bindings: mfd: Add Altera Arria10 SR Reset Controller bindings dt-bindings: reset: a10sr: Add Arria10 SR Reset Controller offsets reset: Add Altera Arria10 SR Reset Controller mfd: altr_a10sr: Add Arria10 DevKit Reset Controller ARM: dts: socfpga: Add Devkit A10-SR Reset Controller .../devicetree/bindings/mfd/altera-a10sr.txt | 11 ++ MAINTAINERS | 2 + arch/arm/boot/dts/socfpga_arria10_socdk.dtsi | 5 + drivers/mfd/altera-a10sr.c | 4 + drivers/reset/Kconfig | 7 ++ drivers/reset/Makefile | 1 + drivers/reset/reset-a10sr.c | 138 +++++++++++++++++++++ include/dt-bindings/reset/altr,rst-mgr-a10sr.h | 33 +++++ 8 files changed, 201 insertions(+) create mode 100644 drivers/reset/reset-a10sr.c create mode 100644 include/dt-bindings/reset/altr,rst-mgr-a10sr.h -- 1.9.1