From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751246AbdBWDT4 (ORCPT ); Wed, 22 Feb 2017 22:19:56 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:51782 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751181AbdBWDTx (ORCPT ); Wed, 22 Feb 2017 22:19:53 -0500 DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 2029E60C92 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=shankerd@codeaurora.org From: Shanker Donthineni To: Catalin Marinas , Will Deacon Cc: linux-kernel , linux-arm-kernel , James Morse , Mark Rutland , Vikram Sethi , Shanker Donthineni Subject: [PATCH] arm64: Fix the kernel panic() on QDF2400 platform Date: Wed, 22 Feb 2017 21:10:48 -0600 Message-Id: <1487819448-8715-1-git-send-email-shankerd@codeaurora.org> X-Mailer: git-send-email 1.9.1 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The commit 38fd94b0 'arm64: Work around Falkor erratum 1003' has been added to fix the hardware bug but causing a system crash. The value of the register x1 which contains 'struct mm_struct *' should be preserved inside macro pre_ttbr0_update_workaround. Macro pre_ttbr0_update_workaround expects 2nd and 3rd arguments are temporary registers. Don't clobber register x1, Otherwise the next load operation 'mmid x1 x1' access the invalid address. [] cpu_do_switch_mm+0x20/0x40 [] efi_virtmap_load+0x34/0x40 [] virt_efi_get_next_variable+0x64/0xc8 [] efivar_init+0x8c/0x348 [] efisubsys_init+0xd4/0x270 [] do_one_initcall+0x80/0x110 [] kernel_init_freeable+0x19c/0x240 [] kernel_init+0x10/0x100 [] ret_from_fork+0x10/0x50 Code: d5033fdf b340bc01 d5182001 d5033fdf (f9416821) ---[ end trace 15247ca922eb6bb7 ]--- note: swapper/0[1] exited with preempt_count 2 Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b SMP: stopping secondary CPUs ---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b Signed-off-by: Shanker Donthineni --- arch/arm64/mm/proc.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S index cd4d53d..877d42f 100644 --- a/arch/arm64/mm/proc.S +++ b/arch/arm64/mm/proc.S @@ -138,7 +138,7 @@ ENDPROC(cpu_do_resume) * - pgd_phys - physical address of new TTB */ ENTRY(cpu_do_switch_mm) - pre_ttbr0_update_workaround x0, x1, x2 + pre_ttbr0_update_workaround x0, x2, x3 mmid x1, x1 // get mm->context.id bfi x0, x1, #48, #16 // set the ASID msr ttbr0_el1, x0 // set TTBR0 -- Qualcomm Datacenter Technologies, Inc. on behalf of the Qualcomm Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.