From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751528AbdEETJO (ORCPT ); Fri, 5 May 2017 15:09:14 -0400 Received: from mga11.intel.com ([192.55.52.93]:64794 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751028AbdEETJN (ORCPT ); Fri, 5 May 2017 15:09:13 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.38,294,1491289200"; d="scan'208";a="1126958644" Message-ID: <1494011349.30052.42.camel@linux.intel.com> Subject: Re: [PATCH v3] iio: adc: Add support for TI ADC108S102 and ADC128S102 From: Andy Shevchenko To: Jonathan Cameron , Jan Kiszka Cc: linux-iio@vger.kernel.org, Linux Kernel Mailing List , Sascha Weisenberger , Mika Westerberg , Peter Meerwald-Stadler , Rob Herring Date: Fri, 05 May 2017 22:09:09 +0300 In-Reply-To: <3ebf6029-aba6-d572-c618-32166a005f0f@kernel.org> References: <6d6bf102-1bc9-7019-13fa-b8f86b002dc8@siemens.com> <3ebf6029-aba6-d572-c618-32166a005f0f@kernel.org> Organization: Intel Finland Oy Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.22.6-1 Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 2017-05-05 at 19:55 +0100, Jonathan Cameron wrote: > On 05/05/17 07:31, Jan Kiszka wrote: > > + > > + /* > > +  * SPI message buffers: > > +  *  tx_buf: |C0|C1|C2|C3|C4|C5|C6|C7|XX| > > +  *  rx_buf: |XX|R0|R1|R2|R3|R4|R5|R6|R7|tt|tt|tt|tt| > > +  * > > +  *  tx_buf: 8 channel read commands, plus 1 dummy command > > +  *  rx_buf: 1 dummy response, 8 channel responses, plus 64- > > bit timestamp > > +  */ > > + __be16 rx_buf[13] > > ____cacheline_aligned; > > + __be16 tx_buf[9] > > ____cacheline_aligned; > > I would have thought the SPI dma wouldn't take itself out so you > should be > good with just the one cacheline_aligned?  Maybe I'm missing > something. It was my idea for sake of consistency. Just to explicitly show that buffers a cache aligned. If you insist to remove one, it's your call at the end ;-) -- Andy Shevchenko Intel Finland Oy