From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1763078AbdEYLbI (ORCPT ); Thu, 25 May 2017 07:31:08 -0400 Received: from smtprelay.synopsys.com ([198.182.47.9]:54238 "EHLO smtprelay.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759205AbdEYLbE (ORCPT ); Thu, 25 May 2017 07:31:04 -0400 From: Alexey Brodkin To: "noamca@mellanox.com" CC: "linux-kernel@vger.kernel.org" , "eladkan@mellanox.com" , "linux-snps-arc@lists.infradead.org" Subject: Re: [PATCH 10/10] ARC: [plat-eznps] Handle memory error as an exception Thread-Topic: [PATCH 10/10] ARC: [plat-eznps] Handle memory error as an exception Thread-Index: AQHS1P+LOC/y0M8+8UyCO0i53555o6IExMEAgAADPQCAAAE9AA== Date: Thu, 25 May 2017 11:30:59 +0000 Message-ID: <1495711858.5393.37.camel@synopsys.com> References: <1495679660-9598-1-git-send-email-noamca@mellanox.com> <1495679660-9598-11-git-send-email-noamca@mellanox.com> <1495710896.5393.32.camel@synopsys.com> In-Reply-To: Accept-Language: en-US, ru-RU Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.121.8.122] Content-Type: text/plain; charset="utf-8" Content-ID: <81EBA2AF1E3A9E4082C28D1994F02E8C@internal.synopsys.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by mail.home.local id v4PBVqGT020571 Hi Noam, On Thu, 2017-05-25 at 11:26 +0000, Noam Camus wrote: > > > > From: Alexey Brodkin [mailto:Alexey.Brodkin@synopsys.com]  > > Sent: Thursday, May 25, 2017 14:15 PM > > > > > > > > > > > > diff --git a/arch/arc/kernel/entry-compact.S  > > > b/arch/arc/kernel/entry-compact.S index f285dbb..d152d36 100644 > > > --- a/arch/arc/kernel/entry-compact.S > > > +++ b/arch/arc/kernel/entry-compact.S > > > @@ -203,6 +203,17 @@ END(handle_interrupt_level2) > > >  ; --------------------------------------------- > > >  ENTRY(mem_service) > > >   > > > +#if defined(CONFIG_EZNPS_MEM_ERROR) > > > +        ; SW workaround to cover up on a difference between > > > +        ; NPS real chip and simulator behaviors. > > > +        ; NPS real chip will activate a machine check exception > > > +        ; in case of memory error, while the simulator will > > > +        ; trigger a level 2 interrupt. Therefor this code section > > > +        ; should be reached only in simulation mode. > > > +        ; DEAD END: display Regs and HALT > > > > > I'm not really buying that. > > > > > Why don't you just make simulator behaving exactly as your real chip? > I can't change simulator core behavior. nSIM is a Synopsys proprietary code. Well probably it worth discussing with nSIM team if they may have any suggestions on how to align nSIM behavior with your real HW? -Alexey