From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752915AbdGCIWn (ORCPT ); Mon, 3 Jul 2017 04:22:43 -0400 Received: from mail-it0-f65.google.com ([209.85.214.65]:34197 "EHLO mail-it0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752830AbdGCIWl (ORCPT ); Mon, 3 Jul 2017 04:22:41 -0400 Message-ID: <1499069889.1734.38.camel@gmail.com> Subject: Re: [PATCH] arm:lpae: build TTB control register value from scratch in v7_ttb_setup From: Hoeun Ryu To: Robin Murphy , Russell King Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Date: Mon, 03 Jul 2017 17:18:09 +0900 In-Reply-To: <1497232084-31907-1-git-send-email-hoeun.ryu@gmail.com> References: <1497232084-31907-1-git-send-email-hoeun.ryu@gmail.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.18.5.2-0ubuntu3.1 Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello, Russell King. Do you have a plan to include this patch in your tree ? Thank you. On Mon, 2017-06-12 at 10:47 +0900, Hoeun Ryu wrote: >  Reading TTBCR in early boot stage might return the value of the > previous > kernel's configuration, especially in case of kexec. For example, if > normal kernel (first kernel) had run on a configuration of > PHYS_OFFSET <= > PAGE_OFFSET and crash kernel (second kernel) is running on a > configuration > PHYS_OFFSET > PAGE_OFFSET, which can happen because it depends on the > reserved area for crash kernel, reading TTBCR and using the value to > OR > other bit fields might be risky because it doesn't have a reset value > for > TTBCR. > > Acked-by: Russell King > Suggested-by: Robin Murphy > Signed-off-by: Hoeun Ryu > > --- > >  * add Acked-by: Russell King >  * v1: amended based on >      - "[PATCHv2] arm: LPAE: kexec: clear TTBCR.T1SZ explicitly when >         PHYS_OFFSET > PAGE_OFFSET" >      - https://lkml.org/lkml/2017/6/5/239 > >  arch/arm/mm/proc-v7-3level.S | 3 +-- >  1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7- > 3level.S > index 5e5720e..7d16bbc 100644 > --- a/arch/arm/mm/proc-v7-3level.S > +++ b/arch/arm/mm/proc-v7-3level.S > @@ -129,8 +129,7 @@ ENDPROC(cpu_v7_set_pte_ext) >   .macro v7_ttb_setup, zero, ttbr0l, ttbr0h, ttbr1, tmp >   ldr \tmp, =swapper_pg_dir @ > swapper_pg_dir virtual address >   cmp \ttbr1, \tmp, lsr #12 @ > PHYS_OFFSET > PAGE_OFFSET? > - mrc p15, 0, \tmp, c2, c0, 2 @ TTB > control egister > - orr \tmp, \tmp, #TTB_EAE > + mov \tmp, #TTB_EAE @ for TTB > control egister >   ALT_SMP(orr \tmp, \tmp, #TTB_FLAGS_SMP) >   ALT_UP(orr \tmp, \tmp, #TTB_FLAGS_UP) >   ALT_SMP(orr \tmp, \tmp, #TTB_FLAGS_SMP << 16)