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From: Mathias Nyman <mathias.nyman@linux.intel.com>
To: "Michał Pecio" <michal.pecio@gmail.com>, ki.chiang65@gmail.com
Cc: gregkh@linuxfoundation.org, linux-kernel@vger.kernel.org,
	linux-usb@vger.kernel.org, mathias.nyman@intel.com,
	stable@vger.kernel.org
Subject: Re: [PATCH 2/3] xhci: Fix control transfer error on Etron xHCI host
Date: Wed, 11 Sep 2024 18:09:25 +0300	[thread overview]
Message-ID: <14c33b7a-19a7-4639-aa4a-c5d259e32fe1@linux.intel.com> (raw)
In-Reply-To: <20240911095233.3e4d734d@foxbook>

> 4. How is it even possible? As far as I see, Linux simply queues
> three TRBs for a control URB. There are 255 slots in a segemnt,
> so exactly 85 URBs should fit, and then back to the first slot.

Not all control transfers have a Data stage TRB.

-Mathias


  reply	other threads:[~2024-09-11 15:07 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-11  5:17 [PATCH 3/3] xhci: Don't perform Soft Retry for Etron xHCI host Kuangyi Chiang
2024-09-11  5:17 ` [PATCH 2/3] xhci: Fix control transfer error on " Kuangyi Chiang
2024-09-11  7:52   ` Michał Pecio
2024-09-11 15:09     ` Mathias Nyman [this message]
2024-09-12  6:19     ` Kuangyi Chiang
2024-09-11 15:07   ` Mathias Nyman
2024-09-13  5:25     ` Kuangyi Chiang
2024-09-11  5:17 ` [PATCH 1/3] xhci: Don't issue Reset Device command to " Kuangyi Chiang
2024-09-11  5:17 ` [PATCH 0/3] xhci: Some improvement for " Kuangyi Chiang
2024-09-11  7:38   ` Michał Pecio
2024-09-12  5:52     ` Kuangyi Chiang
2024-09-12  7:12       ` Michał Pecio
2024-09-16  2:04         ` Kuangyi Chiang

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