From: "Ondřej Jirman" <megous@megous.com>
To: maxime.ripard@free-electrons.com
Cc: icenowy@aosc.io, wens@csie.org,
Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
devicetree <devicetree@vger.kernel.org>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
linux-clk <linux-clk@vger.kernel.org>,
"open list:THERMAL" <linux-pm@vger.kernel.org>,
linux-sunxi <linux-sunxi@googlegroups.com>
Subject: Re: [linux-sunxi] [PATCH 10/10] ARM: dts: sun8i: Add SY8106A regulator to Orange Pi PC
Date: Wed, 26 Jul 2017 14:54:40 +0200 [thread overview]
Message-ID: <1501073680.20056.3.camel@megous.com> (raw)
In-Reply-To: <20170726114420.ipirqgbluqmggcjy@flea>
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Maxime Ripard píše v St 26. 07. 2017 v 13:44 +0200:
> Hi,
>
> On Wed, Jul 26, 2017 at 12:23:48PM +0200, Ondřej Jirman wrote:
> > Hi,
> >
> > icenowy@aosc.io píše v St 26. 07. 2017 v 15:36 +0800:
> > >
> > > > > >
> > > > > > Otherwse
> > > > > >
> > > > > > > + regulator-max-microvolt = <1400000>;
> > > > > > > + regulator-ramp-delay = <200>;
> > > > > >
> > > > > > Is this an actual constraint of the SoC? Or is it a characteristic
> > > > > > of the regulator? If it is the latter, it belongs in the driver.
> > > > > > AFAIK the regulator supports varying the ramp delay (slew rate).
> > >
> > > I don't know...
> > >
> > > Maybe I should ask Ondrej?
> >
> > It is probably neither.
> >
> > It is used to calculate a delay inserted by the kernel between setting
> > a new target voltage over I2C and changing the frequency of the CPU.
> > The actual delay is calculated by the difference between previous and
> > the new voltage.
> >
> > I don't remember seeing anything in the datasheet of the regulator.
> > This is just some low value that works.
> >
> > It would probably be dependent on the capacitance on the output of the
> > regulator, actual load (which varies), etc. So it is a board specific
> > value. One could measure it with an oscilloscope if there's a need to
> > optimize this.
>
> If this is a reasonable default, then this should be in the
> driver. You can't expect anyone to properly calculate a ramp delay and
> have access to both a scope and the CPU power lines.
It translates to 1ms per 0.2V which is highly conservative. The real
times will be in 1-10us range. So I guess this could be a default in
the driver.
regards,
o.
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com
>
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prev parent reply other threads:[~2017-07-26 12:54 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-23 10:27 [PATCH 00/10] A trial to Allwinner H3 DVFS support Icenowy Zheng
2017-07-23 10:27 ` [PATCH 01/10] dt-bindings: add binding for the SY8160A voltage regulator Icenowy Zheng
2017-07-24 3:06 ` [linux-sunxi] " Chen-Yu Tsai
2017-08-03 16:30 ` Rob Herring
2017-07-23 10:27 ` [PATCH 02/10] regulator: add support for SY8106A regulator Icenowy Zheng
2017-07-24 3:03 ` [linux-sunxi] " Chen-Yu Tsai
2017-07-24 3:18 ` icenowy
2017-07-24 3:33 ` Chen-Yu Tsai
2017-07-24 3:38 ` icenowy
2017-07-24 6:17 ` Chen-Yu Tsai
2017-07-24 15:03 ` Mark Brown
2017-07-23 10:27 ` [PATCH 03/10] ARM: sunxi: h3/h5: Add r_i2c pinmux node Icenowy Zheng
2017-07-24 3:07 ` [linux-sunxi] " Chen-Yu Tsai
2017-07-24 3:09 ` icenowy
2017-07-23 10:27 ` [PATCH 04/10] ARM: sunxi: h3/h5: Add r_i2c I2C controller Icenowy Zheng
2017-07-24 3:09 ` [linux-sunxi] " Chen-Yu Tsai
2017-07-23 10:27 ` [PATCH 05/10] clk: sunxi-ng: h3: gate then ungate PLL CPU clk after rate change Icenowy Zheng
2017-07-26 0:36 ` Stephen Boyd
2017-07-26 7:14 ` [linux-sunxi] " Chen-Yu Tsai
2017-08-04 4:09 ` Chen-Yu Tsai
2017-07-23 10:27 ` [PATCH 06/10] clk: sunxi-ng: allow set parent clock (PLL_CPUX) for CPUX clock on H3 Icenowy Zheng
2017-07-24 3:10 ` [linux-sunxi] " Chen-Yu Tsai
2017-08-04 4:10 ` Chen-Yu Tsai
2017-07-26 0:36 ` Stephen Boyd
2017-07-23 10:27 ` [PATCH 07/10] cpufreq: dt: Add support for some new Allwinner SoCs Icenowy Zheng
2017-07-24 8:53 ` Viresh Kumar
2017-07-24 11:46 ` Rafael J. Wysocki
2017-08-15 5:42 ` Chen-Yu Tsai
2017-08-15 12:25 ` Rafael J. Wysocki
2017-08-15 12:38 ` icenowy
2017-08-15 12:39 ` Chen-Yu Tsai
2017-08-17 17:03 ` Chen-Yu Tsai
2017-07-23 10:27 ` [PATCH 08/10] ARM: sun8i: h3: add operating-points-v2 table for CPU Icenowy Zheng
2017-07-23 10:27 ` [PATCH 09/10] ARM: sun8i: h2+: add SY8113B regulator used by Orange Pi Zero board Icenowy Zheng
2017-07-24 4:09 ` [linux-sunxi] " Chen-Yu Tsai
2017-07-23 10:27 ` [PATCH 10/10] ARM: dts: sun8i: Add SY8106A regulator to Orange Pi PC Icenowy Zheng
2017-07-26 7:08 ` [linux-sunxi] " Chen-Yu Tsai
2017-07-26 7:16 ` Icenowy Zheng
2017-07-26 7:30 ` Chen-Yu Tsai
2017-07-26 7:36 ` icenowy
2017-07-26 10:23 ` Ondřej Jirman
2017-07-26 11:44 ` Maxime Ripard
2017-07-26 12:42 ` icenowy
2017-07-26 12:54 ` Ondřej Jirman [this message]
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