From: Nicolin Chen <nicoleotsuka@gmail.com>
To: vinod.koul@intel.com
Cc: fabio.estevam@nxp.com, dan.j.williams@intel.com,
dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH] dmaengine: imx-sdma: Correct addr widths
Date: Wed, 13 Sep 2017 22:39:20 -0700 [thread overview]
Message-ID: <1505367560-24071-1-git-send-email-nicoleotsuka@gmail.com> (raw)
The driver also supports 2_BYTES and 1_BYTE in sdma_prep_slave_sg().
So this patch just adds them to the lists.
Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com>
---
drivers/dma/imx-sdma.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index a67ec1b..2be8d0d 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -178,6 +178,10 @@
#define SDMA_WATERMARK_LEVEL_HWE BIT(29)
#define SDMA_WATERMARK_LEVEL_CONT BIT(31)
+#define SDMA_DMA_BUSWIDTHS (BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) | \
+ BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \
+ BIT(DMA_SLAVE_BUSWIDTH_4_BYTES))
+
/*
* Mode/Count of data node descriptors - IPCv2
*/
@@ -1851,8 +1855,8 @@ static int sdma_probe(struct platform_device *pdev)
sdma->dma_device.device_prep_dma_cyclic = sdma_prep_dma_cyclic;
sdma->dma_device.device_config = sdma_config;
sdma->dma_device.device_terminate_all = sdma_disable_channel_with_delay;
- sdma->dma_device.src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
- sdma->dma_device.dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
+ sdma->dma_device.src_addr_widths = SDMA_DMA_BUSWIDTHS;
+ sdma->dma_device.dst_addr_widths = SDMA_DMA_BUSWIDTHS;
sdma->dma_device.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);
sdma->dma_device.residue_granularity = DMA_RESIDUE_GRANULARITY_SEGMENT;
sdma->dma_device.device_issue_pending = sdma_issue_pending;
--
2.1.4
next reply other threads:[~2017-09-14 5:38 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-14 5:39 Nicolin Chen [this message]
2017-09-14 18:42 ` [PATCH] dmaengine: imx-sdma: Correct addr widths Nicolin Chen
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