[PATCH 2/3] clocksource/mips-gic-timer: Ensure IRQs disabled for read-update-write

[Matt Redfearn <matt.redfearn@mips.com>]

The sequence of reading the current count, adding an offset and writing
back to the compare register is timing critical.
Commit e07127a077c7 ("clocksource: mips-gic-timer: Use new GIC accessor
functions") added a local_irq_save / local_irq_restore to protect the
mapping of another VPs registers through the VP redirect region, but
given the timing critical nature of this code it just feels right to
protect the whole read-update-write section, so move the local_irq_save
before the current count is read.

Signed-off-by: Matt Redfearn <matt.redfearn@mips.com>
---

 drivers/clocksource/mips-gic-timer.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clocksource/mips-gic-timer.c b/drivers/clocksource/mips-gic-timer.c
index 6c94a74682a2..dadac9f3e9c4 100644
--- a/drivers/clocksource/mips-gic-timer.c
+++ b/drivers/clocksource/mips-gic-timer.c
@@ -43,9 +43,9 @@ static int gic_next_event(unsigned long delta, struct clock_event_device *evt)
 	u64 cnt;
 	int res;
 
+	local_irq_save(flags);
 	cnt = gic_read_count();
 	cnt += (u64)delta;
-	local_irq_save(flags);
 	write_gic_vl_other(mips_cm_vp_id(cpumask_first(evt->cpumask)));
 	write_gic_vo_compare(cnt);
 	local_irq_restore(flags);
-- 
2.7.4