From: Amit Nischal <anischal@codeaurora.org>
To: Stephen Boyd <sboyd@codeaurora.org>,
Michael Turquette <mturquette@baylibre.com>
Cc: Andy Gross <andy.gross@linaro.org>,
David Brown <david.brown@linaro.org>,
Rajendra Nayak <rnayak@codeaurora.org>,
Odelu Kukatla <okukatla@codeaurora.org>,
linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
Amit Nischal <anischal@codeaurora.org>
Subject: [PATCH 0/2] clk: qcom: MISC RCG changes for upcoming targets
Date: Tue, 31 Oct 2017 12:49:38 +0530 [thread overview]
Message-ID: <1509434380-24372-1-git-send-email-anischal@codeaurora.org> (raw)
This patch series modifies clk_rcg2_shared_ops to support clock controller
drivers used in future chipsets and also clear hardware clock control bit
of RCGs where HW clock control bit is set in order to control those root
clocks by software.
Amit Nischal (2):
clk: qcom: clear hardware clock control bit of RCG
clk: qcom: Modify RCG shared ops to support freq_tbl without XO entry
drivers/clk/qcom/clk-rcg2.c | 84 +++++++++++++++++++++++++++++++++++++++------
1 file changed, 73 insertions(+), 11 deletions(-)
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
next reply other threads:[~2017-10-31 7:20 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-31 7:19 Amit Nischal [this message]
2017-10-31 7:19 ` [PATCH 1/2] clk: qcom: clear hardware clock control bit of RCG Amit Nischal
2017-10-31 7:19 ` [PATCH 2/2] clk: qcom: Modify RCG shared ops to support freq_tbl without XO entry Amit Nischal
2017-11-02 6:46 ` Stephen Boyd
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