From mboxrd@z Thu Jan 1 00:00:00 1970 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751491AbeAPK4j (ORCPT + 1 other); Tue, 16 Jan 2018 05:56:39 -0500 Received: from mga11.intel.com ([192.55.52.93]:52058 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750832AbeAPK4h (ORCPT ); Tue, 16 Jan 2018 05:56:37 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,368,1511856000"; d="scan'208";a="11316418" Message-ID: <1516100104.7000.1001.camel@linux.intel.com> Subject: Re: [PATCH v1 4/6] x86/boot: Assume MMIO if serial base address supplied via earlyprintk From: Andy Shevchenko To: Ingo Molnar , Greg Kroah-Hartman Cc: "H. Peter Anvin" , Thomas Gleixner , Ingo Molnar , x86@kernel.org, linux-kernel@vger.kernel.org Date: Tue, 16 Jan 2018 12:55:04 +0200 In-Reply-To: <20180116031342.bxczth3ylbzdvk2r@gmail.com> References: <20180114143254.15429-1-andriy.shevchenko@linux.intel.com> <20180114143254.15429-4-andriy.shevchenko@linux.intel.com> <20180116031342.bxczth3ylbzdvk2r@gmail.com> Organization: Intel Finland Oy Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.26.3-1 Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: On Tue, 2018-01-16 at 04:13 +0100, Ingo Molnar wrote: > * Andy Shevchenko wrote: > > > If user supplied serial base address via kernel command line and > > value > > is higher than IO space limit (64k boundary), assume for now that > > MMIO > > byte access is required. > > > > Later we might expand or modify this if needed. > > Is this a standard pattern for serial code configuration values? I didn't get what you meant under "standard" here. IO space limit comes from generic io.h header and AFAIU is a hardware limitation (outN (%dx), ...; inX (%dx); dx is 16 bit register). Using mmio8 out of the IO space is dictated by the (modern) x86 platforms with non-standard (okay, high speed) UART location in address space. -- Andy Shevchenko Intel Finland Oy