From: Sinan Kaya <okaya@codeaurora.org>
To: linux-mips@vger.kernel.org, timur@codeaurora.org, sulrich@codeaurora.org
Cc: arnd@arndb.de, linux-arm-msm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Sinan Kaya <okaya@codeaurora.org>,
Ralf Baechle <ralf@linux-mips.org>,
James Hogan <jhogan@kernel.org>,
Paul Burton <paul.burton@mips.com>,
linux-mips@linux-mips.org, linux-kernel@vger.kernel.org
Subject: [PATCH] MIPS: io: add a barrier after readX()
Date: Mon, 2 Apr 2018 14:10:32 -0400 [thread overview]
Message-ID: <1522692633-24304-1-git-send-email-okaya@codeaurora.org> (raw)
While a barrier is present in writeX() function before the register write,
a similar barrier is missing in the readX() function after the register
read. This could allow register accesses following readX() to observe
stale data.
Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
Reported-by: Arnd Bergmann <arnd@arndb.de>
---
arch/mips/include/asm/io.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index 0cbf3af..7f9068d 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -377,6 +377,7 @@ static inline type pfx##read##bwlq(const volatile void __iomem *mem) \
BUG(); \
} \
\
+ war_io_reorder_wmb(); \
return pfx##ioswab##bwlq(__mem, __val); \
}
--
2.7.4
reply other threads:[~2018-04-02 18:10 UTC|newest]
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