From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B6924C28CF6 for ; Fri, 3 Aug 2018 04:59:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7511421707 for ; Fri, 3 Aug 2018 04:59:02 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7511421707 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727402AbeHCGx3 (ORCPT ); Fri, 3 Aug 2018 02:53:29 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:20705 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726413AbeHCGx2 (ORCPT ); Fri, 3 Aug 2018 02:53:28 -0400 X-UUID: fe384f0045034bb8b6d1404b20bb27d6-20180803 Received: from mtkcas08.mediatek.inc [(172.21.101.126)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 2083652340; Fri, 03 Aug 2018 12:58:54 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs03n2.mediatek.inc (172.21.101.182) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Fri, 3 Aug 2018 12:58:53 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Fri, 3 Aug 2018 12:58:53 +0800 Message-ID: <1533272333.31144.1.camel@mtksdaap41> Subject: Re: [PATCH v2 02/15] drm/mediatek: add connection from RDMA0 to DSI1 From: CK Hu To: Stu Hsieh CC: Philipp Zabel , David Airlie , Matthias Brugger , , , , , Date: Fri, 3 Aug 2018 12:58:53 +0800 In-Reply-To: <1533265868-28110-3-git-send-email-stu.hsieh@mediatek.com> References: <1533265868-28110-1-git-send-email-stu.hsieh@mediatek.com> <1533265868-28110-3-git-send-email-stu.hsieh@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Stu: On Fri, 2018-08-03 at 11:10 +0800, Stu Hsieh wrote: > This patch add connection from RDMA0 to DSI1 > > Signed-off-by: Stu Hsieh Reviewed-by: CK Hu > --- > drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c > index 03e3628b5b0d..310d8482d5a0 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c > @@ -107,6 +107,7 @@ > #define GAMMA_MOUT_EN_RDMA1 0x1 > #define RDMA0_SOUT_DPI0 0x2 > #define RDMA0_SOUT_DPI1 0x3 > +#define RDMA0_SOUT_DSI1 0x1 > #define RDMA0_SOUT_DSI2 0x4 > #define RDMA0_SOUT_DSI3 0x5 > #define RDMA1_SOUT_DPI0 0x2 > @@ -228,6 +229,9 @@ static unsigned int mtk_ddp_mout_en(enum mtk_ddp_comp_id cur, > } else if (cur == DDP_COMPONENT_RDMA0 && next == DDP_COMPONENT_DPI1) { > *addr = DISP_REG_CONFIG_DISP_RDMA0_SOUT_EN; > value = RDMA0_SOUT_DPI1; > + } else if (cur == DDP_COMPONENT_RDMA0 && next == DDP_COMPONENT_DSI1) { > + *addr = DISP_REG_CONFIG_DISP_RDMA0_SOUT_EN; > + value = RDMA0_SOUT_DSI1; > } else if (cur == DDP_COMPONENT_RDMA0 && next == DDP_COMPONENT_DSI2) { > *addr = DISP_REG_CONFIG_DISP_RDMA0_SOUT_EN; > value = RDMA0_SOUT_DSI2;