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From: CK Hu <ck.hu@mediatek.com>
To: Yongqiang Niu <yongqiang.niu@mediatek.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>,
	David Airlie <airlied@linux.ie>, Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	<dri-devel@lists.freedesktop.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>
Subject: Re: [PATCH 14/18] drm/mediatek: add connect function for ovl
Date: Thu, 27 Dec 2018 12:56:13 +0800	[thread overview]
Message-ID: <1545886573.31506.13.camel@mtksdaap41> (raw)
In-Reply-To: <1545638931-24938-15-git-send-email-yongqiang.niu@mediatek.com>

Hi, Yongqiang:

On Mon, 2018-12-24 at 16:08 +0800, Yongqiang Niu wrote:
> This patch add connect function for ovl

Could you describe more about how ovl-2l works? I guess that ovl-2l is a
ovl hardware which has 3 layer, the bottom two layer is from DRAM and
the top layer is from another hardware (maybe the ovl). If my guess is
correct, why not just implement this function in mtk_ovl_layer_on()? In
mtk_ovl_layer_on(), you could do as

if (idx == ovl->data->layer_nr) {
	mtk_ddp_write_mask((1 << 2), comp,
			DISP_REG_OVL_DATAPATH_CON, OVL_BGCLR_SEL_IN);

	return;
}

So does mtk_ovl_layer_off().

Regards,
CK

> 
> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> index a0ab760..3b2ce77 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> @@ -27,6 +27,8 @@
>  #define DISP_REG_OVL_EN				0x000c
>  #define DISP_REG_OVL_RST			0x0014
>  #define DISP_REG_OVL_ROI_SIZE			0x0020
> +#define DISP_REG_OVL_DATAPATH_CON		0x0024
> +#define OVL_BGCLR_SEL_IN                        BIT(2)
>  #define DISP_REG_OVL_ROI_BGCLR			0x0028
>  #define DISP_REG_OVL_SRC_CON			0x002c
>  #define DISP_REG_OVL_CON(n)			(0x0030 + 0x20 * (n))
> @@ -245,6 +247,19 @@ static void mtk_ovl_layer_config(struct mtk_ddp_comp *comp, unsigned int idx,
>  		mtk_ovl_layer_on(comp, idx);
>  }
>  
> +static void mtk_ovl_connect(struct mtk_ddp_comp *comp,
> +			    enum mtk_ddp_comp_id prev)
> +{
> +	int is_ovl = 0;
> +
> +	if (prev == DDP_COMPONENT_OVL0 || prev == DDP_COMPONENT_OVL1 ||
> +	    prev == DDP_COMPONENT_OVL0_2L || prev == DDP_COMPONENT_OVL1_2L)
> +		is_ovl = 1;
> +
> +	mtk_ddp_write_mask((is_ovl << 2), comp,
> +			   DISP_REG_OVL_DATAPATH_CON, OVL_BGCLR_SEL_IN);
> +}
> +
>  static const struct mtk_ddp_comp_funcs mtk_disp_ovl_funcs = {
>  	.config = mtk_ovl_config,
>  	.start = mtk_ovl_start,
> @@ -255,6 +270,7 @@ static void mtk_ovl_layer_config(struct mtk_ddp_comp *comp, unsigned int idx,
>  	.layer_on = mtk_ovl_layer_on,
>  	.layer_off = mtk_ovl_layer_off,
>  	.layer_config = mtk_ovl_layer_config,
> +	.connect = mtk_ovl_connect,
>  };
>  
>  static int mtk_disp_ovl_bind(struct device *dev, struct device *master,



  parent reply	other threads:[~2018-12-27  4:56 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1545638931-24938-1-git-send-email-yongqiang.niu@mediatek.com>
     [not found] ` <1545638931-24938-4-git-send-email-yongqiang.niu@mediatek.com>
2018-12-25  3:57   ` [PATCH 03/18] drm/mediatek: redefine mtk_ddp_sout_sel Nicolas Boichat
2019-03-15  2:06     ` Yongqiang Niu
2019-03-15  3:22       ` Nicolas Boichat
     [not found] ` <1545638931-24938-11-git-send-email-yongqiang.niu@mediatek.com>
2018-12-25  4:15   ` [PATCH 10/18] drm/mediatek: add gmc_bits for ovl private data Nicolas Boichat
2019-03-15  2:34     ` Yongqiang Niu
2019-03-15  3:26       ` Nicolas Boichat
     [not found] ` <1545638931-24938-17-git-send-email-yongqiang.niu@mediatek.com>
2018-12-25  4:19   ` [PATCH 16/18] drm/mediatek: add function mtk_ddp_comp_get_type Nicolas Boichat
     [not found] ` <1545638931-24938-18-git-send-email-yongqiang.niu@mediatek.com>
2018-12-25  4:22   ` [PATCH 17/18] drm/mediatek: add ovl0/ovl0_2l usecase Nicolas Boichat
     [not found] ` <1545638931-24938-2-git-send-email-yongqiang.niu@mediatek.com>
2018-12-26  1:49   ` [PATCH 01/18] drm/mediatek: update dt-bindings for mt8183 CK Hu
     [not found] ` <1545638931-24938-3-git-send-email-yongqiang.niu@mediatek.com>
2018-12-26  2:56   ` [PATCH 02/18] drm/mediatek: add mutex mod and sof into ddp private data CK Hu
     [not found] ` <1545638931-24938-5-git-send-email-yongqiang.niu@mediatek.com>
2018-12-26  3:51   ` [PATCH 04/18] drm/mediatek: move rdma sout from mtk_ddp_mout_en into mtk_ddp_sout_sel CK Hu
     [not found] ` <1545638931-24938-6-git-send-email-yongqiang.niu@mediatek.com>
2018-12-26  5:27   ` [PATCH 05/18] drm/mediatek: add ddp component CCORR CK Hu
     [not found] ` <1545638931-24938-7-git-send-email-yongqiang.niu@mediatek.com>
2018-12-26  6:01   ` [PATCH 06/18] drm/mediatek: add mmsys private data for ddp path config CK Hu
     [not found] ` <1545638931-24938-8-git-send-email-yongqiang.niu@mediatek.com>
2018-12-26  9:09   ` [PATCH 07/18] drm/mediatek: add commponent OVL0_2L CK Hu
     [not found] ` <1545638931-24938-10-git-send-email-yongqiang.niu@mediatek.com>
2018-12-26  9:13   ` [PATCH 09/18] drm/mediatek: add component DITHER CK Hu
     [not found] ` <1545638931-24938-12-git-send-email-yongqiang.niu@mediatek.com>
2018-12-27  1:16   ` [PATCH 11/18] drm/medaitek: add layer_nr for ovl private data CK Hu
     [not found] ` <1545638931-24938-14-git-send-email-yongqiang.niu@mediatek.com>
2018-12-27  4:26   ` [PATCH 13/18] drm/mediatek: add ddp write register common api CK Hu
     [not found] ` <1545638931-24938-15-git-send-email-yongqiang.niu@mediatek.com>
2018-12-27  4:56   ` CK Hu [this message]
     [not found] ` <1545638931-24938-16-git-send-email-yongqiang.niu@mediatek.com>
2018-12-27  8:08   ` [PATCH 15/18] drm/mediatek: add RDMA1 fifo size into RDMA private data CK Hu

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