From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE619C7112F for ; Mon, 21 Jan 2019 12:23:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A79F62084A for ; Mon, 21 Jan 2019 12:23:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728664AbfAUMXD (ORCPT ); Mon, 21 Jan 2019 07:23:03 -0500 Received: from mailgw02.mediatek.com ([1.203.163.81]:31944 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1728127AbfAUMW6 (ORCPT ); Mon, 21 Jan 2019 07:22:58 -0500 X-UUID: 2c6fd5d8c0db4ae4a0ce8377b0c99512-20190121 X-UUID: 2c6fd5d8c0db4ae4a0ce8377b0c99512-20190121 Received: from mtkcas32.mediatek.inc [(172.27.4.250)] by mailgw02.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 1142439757; Mon, 21 Jan 2019 20:22:41 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by MTKMBS31DR.mediatek.inc (172.27.6.102) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 21 Jan 2019 20:22:39 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 21 Jan 2019 20:22:39 +0800 From: To: Bin Liu , Rob Herring CC: Greg Kroah-Hartman , Mark Rutland , Matthias Brugger , Alan Stern , , , , , , , , , Min Guo Subject: [PATCH v4 1/6] dt-bindings: usb: musb: Add support for MediaTek musb controller Date: Mon, 21 Jan 2019 20:22:26 +0800 Message-ID: <1548073351-13739-2-git-send-email-min.guo@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1548073351-13739-1-git-send-email-min.guo@mediatek.com> References: <1548073351-13739-1-git-send-email-min.guo@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Min Guo This adds support for MediaTek musb controller in host, peripheral and otg mode. Signed-off-by: Min Guo --- changes in v4: suggested by Sergei: 1. String alignment changes in v3: 1. no changes changes in v2: suggested by Bin: 1. Modify DRC to DRD suggested by Rob: 2. Drop the "-musb" in compatible 3. Remove phy-names 4. Add space after comma in clock-names --- .../devicetree/bindings/usb/mediatek,musb.txt | 43 ++++++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/mediatek,musb.txt diff --git a/Documentation/devicetree/bindings/usb/mediatek,musb.txt b/Documentation/devicetree/bindings/usb/mediatek,musb.txt new file mode 100644 index 0000000..4305770 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/mediatek,musb.txt @@ -0,0 +1,43 @@ +MediaTek musb DRD/OTG controller +------------------------------------------- + +Required properties: + - compatible : should be "mediatek,mtk-musb" + - reg : specifies physical base address and size of + the registers + - interrupts : interrupt used by musb controller + - interrupt-names : must be "mc" + - phys : PHY specifier for the OTG phy + - dr_mode : should be one of "host", "peripheral" or "otg", + refer to usb/generic.txt + - clocks : a list of phandle + clock-specifier pairs, one for + each entry in clock-names + - clock-names : must contain "main", "mcu", "univpll" + for clocks of controller + +Optional properties: + - extcon : external connector for VBUS and ID pin changes detection, + needed when supports dual-role mode + - vbus-supply : reference to the VBUS regulator, needed when supports + dual-role mode + - power-domains : a phandle to USB power domain node to control USB's + MTCMOS + +Example: + +usb2: usb@11200000 { + compatible = "mediatek,mt2701-musb", + "mediatek,mtk-musb"; + reg = <0 0x11200000 0 0x1000>; + interrupts = ; + interrupt-names = "mc"; + phys = <&u2port2 PHY_TYPE_USB2>; + vbus-supply = <&usb_vbus>; + extcon = <&extcon_usb>; + dr_mode = "otg"; + clocks = <&pericfg CLK_PERI_USB0>, + <&pericfg CLK_PERI_USB0_MCU>, + <&pericfg CLK_PERI_USB_SLV>; + clock-names = "main","mcu","univpll"; + power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>; +}; -- 1.9.1