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From: kan.liang@linux.intel.com
To: x86@kernel.org, linux-kernel@vger.kernel.org, tglx@linutronix.de,
	bp@alien8.de, peterz@infradead.org, mingo@redhat.com
Cc: ak@linux.intel.com, eranian@google.com,
	Kan Liang <kan.liang@linux.intel.com>
Subject: [PATCH V6 3/5] perf/x86/intel: Clean up SNB pebs quirk
Date: Mon, 21 Jan 2019 13:42:29 -0800	[thread overview]
Message-ID: <1548106951-4811-3-git-send-email-kan.liang@linux.intel.com> (raw)
In-Reply-To: <1548106951-4811-1-git-send-email-kan.liang@linux.intel.com>

From: Kan Liang <kan.liang@linux.intel.com>

Clean up SNB pebs quirk to use the new facility to check for min
microcode revisions.

Only check the boot CPU, assuming models and features are consistent
over all CPUs.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
---

Changes since V5:
- New patch to address Peter's comments.

 arch/x86/events/intel/core.c | 35 ++++++++++-------------------------
 1 file changed, 10 insertions(+), 25 deletions(-)

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 13baff5..a3c7845 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -3780,36 +3780,21 @@ static void intel_check_isolation(void)
 	x86_pmu.pebs_no_isolation = !x86_cpu_has_min_microcode_rev(isolation_ucodes);
 }
 
-static int intel_snb_pebs_broken(int cpu)
-{
-	u32 rev = UINT_MAX; /* default to broken for unknown models */
-
-	switch (cpu_data(cpu).x86_model) {
-	case INTEL_FAM6_SANDYBRIDGE:
-		rev = 0x28;
-		break;
-
-	case INTEL_FAM6_SANDYBRIDGE_X:
-		switch (cpu_data(cpu).x86_stepping) {
-		case 6: rev = 0x618; break;
-		case 7: rev = 0x70c; break;
-		}
-	}
+static const struct x86_cpu_desc pebs_ucodes[] = {
+	INTEL_CPU_DESC(INTEL_FAM6_SANDYBRIDGE,		7, 0x00000028),
+	INTEL_CPU_DESC(INTEL_FAM6_SANDYBRIDGE_X,	6, 0x00000618),
+	INTEL_CPU_DESC(INTEL_FAM6_SANDYBRIDGE_X,	7, 0x0000070c),
+	{}
+};
 
-	return (cpu_data(cpu).microcode < rev);
+static bool intel_snb_pebs_broken(void)
+{
+	return !x86_cpu_has_min_microcode_rev(pebs_ucodes);
 }
 
 static void intel_snb_check_microcode(void)
 {
-	int pebs_broken = 0;
-	int cpu;
-
-	for_each_online_cpu(cpu) {
-		if ((pebs_broken = intel_snb_pebs_broken(cpu)))
-			break;
-	}
-
-	if (pebs_broken == x86_pmu.pebs_broken)
+	if (intel_snb_pebs_broken() == x86_pmu.pebs_broken)
 		return;
 
 	/*
-- 
2.7.4


  parent reply	other threads:[~2019-01-21 21:43 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-21 21:42 [PATCH V6 1/5] x86/cpufeature: Add facility to check for min microcode revisions kan.liang
2019-01-21 21:42 ` [PATCH V6 2/5] perf/x86/kvm: Avoid unnecessary work in guest filtering kan.liang
2019-02-04 15:06   ` Peter Zijlstra
2019-02-04 15:17     ` Peter Zijlstra
2019-02-04 15:39       ` Liang, Kan
2019-02-04 15:38   ` Peter Zijlstra
2019-02-04 15:43     ` Liang, Kan
2019-02-04 16:15       ` Peter Zijlstra
2019-02-04 16:18         ` Liang, Kan
2019-02-04 15:44     ` Peter Zijlstra
2019-02-04 15:57       ` Liang, Kan
2019-02-04 16:04         ` Borislav Petkov
2019-02-04 16:23           ` Liang, Kan
2019-02-04 16:41             ` Borislav Petkov
2019-02-04 16:13         ` Andi Kleen
2019-02-04 16:23         ` Peter Zijlstra
2019-02-04 16:55           ` Liang, Kan
2019-02-04 18:15             ` Borislav Petkov
2019-02-04 18:57               ` Liang, Kan
2019-02-04 19:43                 ` Borislav Petkov
2019-02-04 20:37                   ` Liang, Kan
2019-02-04 16:10   ` Peter Zijlstra
2019-02-04 16:16     ` Liang, Kan
2019-01-21 21:42 ` kan.liang [this message]
2019-01-21 21:42 ` [PATCH V6 4/5] perf/x86/intel: Clean up counter freezing quirk kan.liang
2019-01-21 21:42 ` [PATCH V6 5/5] perf/x86/intel: Add counter freezing quirk for Goldmont kan.liang
2019-02-04 14:27 ` [PATCH V6 1/5] x86/cpufeature: Add facility to check for min microcode revisions Liang, Kan

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