Re: [PATCH 1/3] arm64: perf: Mark expected switch fall-through

From: Robin Murphy <robin.murphy@arm.com>
To: Will Deacon <will@kernel.org>, Mark Rutland <mark.rutland@arm.com>
Cc: Anders Roxell <anders.roxell@linaro.org>,
	Kees Cook <keescook@chromium.org>,
	"Gustavo A. R. Silva" <gustavo@embeddedor.com>,
	catalin.marinas@arm.com, linux-kernel@vger.kernel.org,
	stable@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 1/3] arm64: perf: Mark expected switch fall-through
Date: Fri, 26 Jul 2019 13:38:24 +0100	[thread overview]
Message-ID: <1549fe77-367f-fee1-c09c-e429fca91051@arm.com> (raw)
In-Reply-To: <20190726122728.jhn4e6wq7rcowyi4@willie-the-truck>

On 26/07/2019 13:27, Will Deacon wrote:
> On Fri, Jul 26, 2019 at 01:13:54PM +0100, Mark Rutland wrote:
>> On Fri, Jul 26, 2019 at 01:10:57PM +0100, Mark Rutland wrote:
>>> On Fri, Jul 26, 2019 at 01:27:16PM +0200, Anders Roxell wrote:
>>>> When fall-through warnings was enabled by default, commit d93512ef0f0e
>>>> ("Makefile: Globally enable fall-through warning"), the following
>>>> warnings was starting to show up:
>>>>
>>>> ../arch/arm64/kernel/hw_breakpoint.c: In function ‘hw_breakpoint_arch_parse’:
>>>> ../arch/arm64/kernel/hw_breakpoint.c:540:7: warning: this statement may fall
>>>>   through [-Wimplicit-fallthrough=]
>>>>      if (hw->ctrl.len == ARM_BREAKPOINT_LEN_1)
>>>>         ^
>>>> ../arch/arm64/kernel/hw_breakpoint.c:542:3: note: here
>>>>     case 2:
>>>>     ^~~~
>>>> ../arch/arm64/kernel/hw_breakpoint.c:544:7: warning: this statement may fall
>>>>   through [-Wimplicit-fallthrough=]
>>>>      if (hw->ctrl.len == ARM_BREAKPOINT_LEN_2)
>>>>         ^
>>>> ../arch/arm64/kernel/hw_breakpoint.c:546:3: note: here
>>>>     default:
>>>>     ^~~~~~~
>>>>
>>>> Rework so that the compiler doesn't warn about fall-through. Rework so
>>>> the code looks like the arm code. Since the comment in the function
>>>> indicates taht this is supposed to behave the same way as arm32 because
>>>
>>> Typo: s/taht/that/
>>>
>>>> it handles 32-bit tasks also.
>>>>
>>>> Cc: stable@vger.kernel.org # v3.16+
>>>> Fixes: 6ee33c2712fc ("ARM: hw_breakpoint: correct and simplify alignment fixup code")
>>>> Signed-off-by: Anders Roxell <anders.roxell@linaro.org>
>>>
>>> The patch itself looks fine, but I don't think this needs a CC to
>>> stable, nor does it require that fixes tag, as there's no functional
>>> problem.
>>
>> Hmm... I now see I spoke too soon, and this is making the 1-byte
>> breakpoint work at a 3-byte offset.
> 
> I still don't think it's quite right though, since it forbids a 2-byte
> watchpoint on a byte-aligned address.

Plus, AFAICS, a 1-byte watchpoint on a 2-byte-aligned address.

Not that I know anything about this code, but it does start to look like 
it might want rewriting without the offending switch statement anyway. 
At a glance, it looks like the intended semantic might boil down to:

	if (hw->ctrl.len > offset)
		return -EINVAL;

Robin.

> I think the arm64 code matches what we had on 32-bit prior to
> d968d2b801d8 ("ARM: 7497/1: hw_breakpoint: allow single-byte watchpoints
> on all addresses"), so we should have one patch bringing us up to speed
> with that change, and then another annotating the fallthroughs.
> 
> Will
> 
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