From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 55D04C43381 for ; Thu, 14 Feb 2019 16:13:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 306A0206C0 for ; Thu, 14 Feb 2019 16:13:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2393473AbfBNQN4 (ORCPT ); Thu, 14 Feb 2019 11:13:56 -0500 Received: from Mailgw01.mediatek.com ([1.203.163.78]:49408 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1729621AbfBNQN4 (ORCPT ); Thu, 14 Feb 2019 11:13:56 -0500 X-UUID: 9f0100196e944bd1a7f1bd920773e83a-20190215 X-UUID: 9f0100196e944bd1a7f1bd920773e83a-20190215 Received: from mtkcas34.mediatek.inc [(172.27.4.250)] by mailgw01.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 195359234; Fri, 15 Feb 2019 00:13:44 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by MTKMBS33N1.mediatek.inc (172.27.4.75) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 15 Feb 2019 00:13:42 +0800 Received: from [172.21.77.4] (172.21.77.4) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Fri, 15 Feb 2019 00:13:29 +0800 Message-ID: <1550160809.6862.13.camel@mtksdaap41> Subject: Re: [PATCH] drm/mediatek: add mt8183 dpi support From: CK Hu To: Jitao Shi CC: Rob Herring , Pawel Moll , "Mark Rutland" , Ian Campbell , Kumar Gala , , David Airlie , "Matthias Brugger" , Thierry Reding , "Ajay Kumar" , Inki Dae , "Rahul Sharma" , Sean Paul , Vincent Palatin , Andy Yan , Philipp Zabel , "Russell King" , , , , , , , Sascha Hauer , , , , , Date: Fri, 15 Feb 2019 00:13:29 +0800 In-Reply-To: <20190211045059.11821-1-jitao.shi@mediatek.com> References: <20190211045059.11821-1-jitao.shi@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Jitao: On Mon, 2019-02-11 at 12:50 +0800, Jitao Shi wrote: > MT8183 sample on rising and falling edge. It can reduce half data io. > > Signed-off-by: Jitao Shi > --- > drivers/gpu/drm/mediatek/mtk_dpi.c | 29 +++++++++++++++++++++++++++++ > 1 file changed, 29 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c > index 62a9d47df948..610c23334047 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > @@ -117,6 +117,7 @@ struct mtk_dpi_conf { > unsigned int (*cal_factor)(int clock); > u32 reg_h_fre_con; > bool edge_sel_en; > + bool dual_edge; > }; > > static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mask) > @@ -353,6 +354,13 @@ static void mtk_dpi_config_disable_edge(struct mtk_dpi *dpi) > mtk_dpi_mask(dpi, dpi->conf->reg_h_fre_con, 0, EDGE_SEL_EN); > } > > +static void mtk_dpi_enable_dual_edge(struct mtk_dpi *dpi) > +{ > + mtk_dpi_mask(dpi, DPI_DDR_SETTING, DDR_EN | DDR_4PHASE, > + DDR_EN | DDR_4PHASE); > + mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, EDGE_SEL, EDGE_SEL); > +} All these register exist in MT8173, if you do the same setting in MT8173, could it also sample on rising edge and falling edge? Regards, CK > + > static void mtk_dpi_config_color_format(struct mtk_dpi *dpi, > enum mtk_dpi_out_color_format format) > { > @@ -509,6 +517,8 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi, > mtk_dpi_config_color_format(dpi, dpi->color_format); > mtk_dpi_config_2n_h_fre(dpi); > mtk_dpi_config_disable_edge(dpi); > + if (dpi->conf->dual_edge) > + mtk_dpi_enable_dual_edge(dpi); > mtk_dpi_sw_reset(dpi, false); > > return 0; > @@ -671,6 +681,16 @@ static unsigned int mt2701_calculate_factor(int clock) > return 2; > } > > +static unsigned int mt8183_calculate_factor(int clock) > +{ > + if (clock <= 27000) > + return 8; > + else if (clock <= 167000) > + return 4; > + else > + return 2; > +} > + > static const struct mtk_dpi_conf mt8173_conf = { > .cal_factor = mt8173_calculate_factor, > .reg_h_fre_con = 0xe0, > @@ -682,6 +702,12 @@ static const struct mtk_dpi_conf mt2701_conf = { > .edge_sel_en = true, > }; > > +static const struct mtk_dpi_conf mt8183_conf = { > + .cal_factor = mt8183_calculate_factor, > + .reg_h_fre_con = 0xe0, > + .dual_edge = true, > +}; > + > static int mtk_dpi_probe(struct platform_device *pdev) > { > struct device *dev = &pdev->dev; > @@ -777,6 +803,9 @@ static const struct of_device_id mtk_dpi_of_ids[] = { > { .compatible = "mediatek,mt8173-dpi", > .data = &mt8173_conf, > }, > + { .compatible = "mediatek,mt8183-dpi", > + .data = &mt8183_conf, > + }, > { }, > }; >