From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.1 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B9F75C43219 for ; Mon, 29 Apr 2019 10:04:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8737C20644 for ; Mon, 29 Apr 2019 10:04:02 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=st.com header.i=@st.com header.b="XKdesF5t" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727822AbfD2KEB (ORCPT ); Mon, 29 Apr 2019 06:04:01 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:16434 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727740AbfD2KD7 (ORCPT ); Mon, 29 Apr 2019 06:03:59 -0400 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x3TA1rtx011137; Mon, 29 Apr 2019 12:03:29 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : content-type : content-transfer-encoding : mime-version; s=STMicroelectronics; bh=DpoTfHz7/K/KSDDjaslQS/haOcbJqcn4nklrvjzyMCE=; b=XKdesF5tx4cpKu6iU1fsZTX2rUos7yD0vbnx5yWoKHBav1DrBlLZq85/XIDwezqJ5N9H 1GOjiC91KbxA0plkTaypZLWBolijKDGKClmo4UrqybHRXviHFSszTbpQ4yrTb+eGwLwz j+KEDkiY4ICEQVGODJ6nz3xOZxWg8e86MpS5kwV48QAatpj2BWp0EZfhmvWYDys7mbHg 5KKk1k+MVO3weR3zAK39VK4Ur+Ii/4TaqwgfLnLW+ucLuQOkZK4vrcnK0l+yqgZcxUQS u3VBBU47L3hu+N234byZvN1uOqz4k/wUPi1nIIfCN+w6YFbnx8nrjvTgRYWmPPWgIlYP xg== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2s4cj0bfpw-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Mon, 29 Apr 2019 12:03:29 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id BFB2A31; Mon, 29 Apr 2019 10:03:27 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag3node3.st.com [10.75.127.9]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 803A51516; Mon, 29 Apr 2019 10:03:27 +0000 (GMT) Received: from SFHDAG5NODE1.st.com (10.75.127.13) by SFHDAG3NODE3.st.com (10.75.127.9) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Mon, 29 Apr 2019 12:03:27 +0200 Received: from SFHDAG5NODE1.st.com ([fe80::cc53:528c:36c8:95f6]) by SFHDAG5NODE1.st.com ([fe80::cc53:528c:36c8:95f6%20]) with mapi id 15.00.1347.000; Mon, 29 Apr 2019 12:03:27 +0200 From: Gerald BAEZA To: "will.deacon@arm.com" , "mark.rutland@arm.com" , "robh+dt@kernel.org" , "mcoquelin.stm32@gmail.com" , Alexandre TORGUE , "corbet@lwn.net" , "linux@armlinux.org.uk" , "olof@lixom.net" , "horms+renesas@verge.net.au" , "arnd@arndb.de" CC: "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-stm32@st-md-mailman.stormreply.com" , "linux-kernel@vger.kernel.org" , "linux-doc@vger.kernel.org" , Gerald BAEZA Subject: [PATCH 0/5] stm32-ddr-pmu driver creation Thread-Topic: [PATCH 0/5] stm32-ddr-pmu driver creation Thread-Index: AQHU/nLKF7OhsIWL502SfbL6GLT5iw== Date: Mon, 29 Apr 2019 10:03:27 +0000 Message-ID: <1556532194-27904-1-git-send-email-gerald.baeza@st.com> Accept-Language: fr-FR, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-messagesentrepresentingtype: 1 x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.75.127.51] Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2019-04-29_05:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The DDRPERFM is the DDR Performance Monitor embedded in STM32MP1 SOC. This series adds support for the DDRPERFM via a new stm32-ddr-pmu driver, registered into the perf framework. This driver is inspired from arch/arm/mm/cache-l2x0-pmu.c This series depends on the "clk: stm32mp1: Add ddrperfm clock" patch, sent separately. Gerald Baeza (5): Documentation: perf: stm32: ddrperfm support dt-bindings: perf: stm32: ddrperfm support perf: stm32: ddrperfm driver creation ARM: configs: enable STM32_DDR_PMU ARM: dts: stm32: add ddrperfm on stm32mp157c .../devicetree/bindings/perf/stm32-ddr-pmu.txt | 18 + Documentation/perf/stm32-ddr-pmu.txt | 41 ++ arch/arm/boot/dts/stm32mp157c.dtsi | 9 + arch/arm/configs/multi_v7_defconfig | 1 + drivers/perf/Kconfig | 6 + drivers/perf/Makefile | 1 + drivers/perf/stm32_ddr_pmu.c | 502 +++++++++++++++++= ++++ 7 files changed, 578 insertions(+) create mode 100644 Documentation/devicetree/bindings/perf/stm32-ddr-pmu.tx= t create mode 100644 Documentation/perf/stm32-ddr-pmu.txt create mode 100644 drivers/perf/stm32_ddr_pmu.c --=20 2.7.4