From: Sowjanya Komatineni <skomatineni@nvidia.com>
To: <thierry.reding@gmail.com>, <jonathanh@nvidia.com>
Cc: <jckuo@nvidia.com>, <talho@nvidia.com>, <josephl@nvidia.com>,
<skomatineni@nvidia.com>, <linux-tegra@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Subject: [PATCH V1 01/12] irqchip: tegra: do not disable COP IRQ during suspend
Date: Tue, 21 May 2019 16:31:12 -0700 [thread overview]
Message-ID: <1558481483-22254-2-git-send-email-skomatineni@nvidia.com> (raw)
In-Reply-To: <1558481483-22254-1-git-send-email-skomatineni@nvidia.com>
BPMP-lite still need IRQ function to finish SC7 suspend sequence for
Tegra210.
This patch has fix for leaving the COP IRQ enabled for Tegra210 during
interrupt controller suspend operation.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
---
drivers/irqchip/irq-tegra.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-tegra.c b/drivers/irqchip/irq-tegra.c
index 0abc0cd1c32e..1882373fa1fd 100644
--- a/drivers/irqchip/irq-tegra.c
+++ b/drivers/irqchip/irq-tegra.c
@@ -53,18 +53,24 @@ static unsigned int num_ictlrs;
struct tegra_ictlr_soc {
unsigned int num_ictlrs;
+ bool has_bpmpl;
};
+static const struct tegra_ictlr_soc *soc;
+
static const struct tegra_ictlr_soc tegra20_ictlr_soc = {
.num_ictlrs = 4,
+ .has_bpmpl = false,
};
static const struct tegra_ictlr_soc tegra30_ictlr_soc = {
.num_ictlrs = 5,
+ .has_bpmpl = false,
};
static const struct tegra_ictlr_soc tegra210_ictlr_soc = {
.num_ictlrs = 6,
+ .has_bpmpl = true,
};
static const struct of_device_id ictlr_matches[] = {
@@ -157,7 +163,8 @@ static int tegra_ictlr_suspend(void)
lic->cop_iep[i] = readl_relaxed(ictlr + ICTLR_COP_IEP_CLASS);
/* Disable COP interrupts */
- writel_relaxed(~0ul, ictlr + ICTLR_COP_IER_CLR);
+ if (!soc->has_bpmpl)
+ writel_relaxed(~0ul, ictlr + ICTLR_COP_IER_CLR);
/* Disable CPU interrupts */
writel_relaxed(~0ul, ictlr + ICTLR_CPU_IER_CLR);
@@ -286,7 +293,6 @@ static int __init tegra_ictlr_init(struct device_node *node,
{
struct irq_domain *parent_domain, *domain;
const struct of_device_id *match;
- const struct tegra_ictlr_soc *soc;
unsigned int i;
int err;
--
2.7.4
next prev parent reply other threads:[~2019-05-21 23:32 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-21 23:31 [PATCH V1 00/12] LP0 entry and exit support for Tegra210 Sowjanya Komatineni
2019-05-21 23:31 ` Sowjanya Komatineni [this message]
2019-05-22 12:12 ` [PATCH V1 01/12] irqchip: tegra: do not disable COP IRQ during suspend Thierry Reding
2019-05-21 23:31 ` [PATCH V1 02/12] pinctrl: tegra: add suspend and resume support Sowjanya Komatineni
2019-05-22 12:37 ` Thierry Reding
2019-05-21 23:31 ` [PATCH V1 03/12] clk: tegra: save and restore PLLs state for system Sowjanya Komatineni
2019-05-22 13:31 ` Thierry Reding
2019-05-21 23:31 ` [PATCH V1 04/12] clk: tegra: add support for peripheral clock suspend and resume Sowjanya Komatineni
2019-05-21 23:31 ` [PATCH V1 05/12] clk: tegra: add support for OSC clock resume Sowjanya Komatineni
2019-05-21 23:31 ` [PATCH V1 06/12] clk: tegra: add suspend resume support for DFLL clock Sowjanya Komatineni
2019-05-21 23:31 ` [PATCH V1 07/12] clk: tegra: support for Tegra210 clocks suspend-resume Sowjanya Komatineni
2019-05-21 23:31 ` [PATCH V1 08/12] soc/tegra: pmc: allow support for more tegra wake models Sowjanya Komatineni
2019-05-22 12:49 ` Thierry Reding
2019-05-22 13:02 ` Thierry Reding
2019-05-21 23:31 ` [PATCH V1 09/12] soc/tegra: pmc: add pmc wake support for tegra210 Sowjanya Komatineni
2019-05-22 13:01 ` Thierry Reding
2019-05-21 23:31 ` [PATCH V1 10/12] gpio: tegra: implement wake event support for Tegra210 and prior GPIO Sowjanya Komatineni
2019-05-22 13:24 ` Thierry Reding
2019-05-25 20:39 ` Sowjanya Komatineni
2019-05-21 23:31 ` [PATCH V1 11/12] soc/tegra: pmc: configure tegra deep sleep control settings Sowjanya Komatineni
2019-05-22 13:28 ` Thierry Reding
2019-05-21 23:31 ` [PATCH V1 12/12] arm64: tegra: enable wake from deep sleep on RTC alarm Sowjanya Komatineni
2019-05-22 13:33 ` [PATCH V1 00/12] LP0 entry and exit support for Tegra210 Thierry Reding
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