From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, UNPARSEABLE_RELAY,UNWANTED_LANGUAGE_BODY,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3A846C04AB5 for ; Thu, 6 Jun 2019 05:42:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 086CA20673 for ; Thu, 6 Jun 2019 05:42:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726369AbfFFFmv (ORCPT ); Thu, 6 Jun 2019 01:42:51 -0400 Received: from Mailgw01.mediatek.com ([1.203.163.78]:29517 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1725267AbfFFFmu (ORCPT ); Thu, 6 Jun 2019 01:42:50 -0400 X-UUID: 9c3da1f7682a4564842f2f6a9a9598ad-20190606 X-UUID: 9c3da1f7682a4564842f2f6a9a9598ad-20190606 Received: from mtkcas34.mediatek.inc [(172.27.4.253)] by mailgw01.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 520499542; Thu, 06 Jun 2019 13:42:43 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by MTKMBS31N2.mediatek.inc (172.27.4.87) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 6 Jun 2019 13:42:39 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Thu, 6 Jun 2019 13:42:37 +0800 Message-ID: <1559799757.20098.6.camel@mtksdaap41> Subject: Re: [PATCH v3, 06/27] drm/mediatek: add mutex mod into ddp private data From: CK Hu To: CC: Philipp Zabel , Rob Herring , Matthias Brugger , "David Airlie" , Daniel Vetter , Mark Rutland , , , , , Date: Thu, 6 Jun 2019 13:42:37 +0800 In-Reply-To: <1559734986-7379-7-git-send-email-yongqiang.niu@mediatek.com> References: <1559734986-7379-1-git-send-email-yongqiang.niu@mediatek.com> <1559734986-7379-7-git-send-email-yongqiang.niu@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Yongqiang: On Wed, 2019-06-05 at 19:42 +0800, yongqiang.niu@mediatek.com wrote: > From: Yongqiang Niu > > except mutex mod, mutex mod reg,mutex sof reg, > and mutex sof id will be ddp private data > > Signed-off-by: Yongqiang Niu > --- > drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 53 +++++++++++++++++++++++----------- > 1 file changed, 36 insertions(+), 17 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c > index 579ce28..ae94d44 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c > @@ -41,12 +41,12 @@ > #define DISP_REG_CONFIG_DSI_SEL 0x050 > #define DISP_REG_CONFIG_DPI_SEL 0x064 > > -#define DISP_REG_MUTEX_EN(n) (0x20 + 0x20 * (n)) > -#define DISP_REG_MUTEX(n) (0x24 + 0x20 * (n)) > -#define DISP_REG_MUTEX_RST(n) (0x28 + 0x20 * (n)) > -#define DISP_REG_MUTEX_MOD(n) (0x2c + 0x20 * (n)) > -#define DISP_REG_MUTEX_SOF(n) (0x30 + 0x20 * (n)) > -#define DISP_REG_MUTEX_MOD2(n) (0x34 + 0x20 * (n)) > +#define DISP_REG_MUTEX_EN(n) (0x20 + 0x20 * (n)) > +#define DISP_REG_MUTEX(n) (0x24 + 0x20 * (n)) > +#define DISP_REG_MUTEX_RST(n) (0x28 + 0x20 * (n)) > +#define DISP_REG_MUTEX_MOD(n) (0x2c + 0x20 * (n)) > +#define DISP_REG_MUTEX_SOF(n) (0x30 + 0x20 * (n)) > +#define DISP_REG_MUTEX_MOD2(n) (0x34 + 0x20 * (n)) You add 'tab' because of "add mutex mod register offset into ddp private data" not "add mutex mod into ddp private data", so move this to the related patch. Regards, CK > > #define INT_MUTEX BIT(1) > > @@ -147,12 +147,16 @@ struct mtk_disp_mutex { > bool claimed; > }; > > +struct mtk_ddp_data { > + const unsigned int *mutex_mod; > +}; > + > struct mtk_ddp { > struct device *dev; > struct clk *clk; > void __iomem *regs; > struct mtk_disp_mutex mutex[10]; > - const unsigned int *mutex_mod; > + const struct mtk_ddp_data *data; > }; > > static const unsigned int mt2701_mutex_mod[DDP_COMPONENT_ID_MAX] = { > @@ -202,6 +206,18 @@ struct mtk_ddp { > [DDP_COMPONENT_WDMA1] = MT8173_MUTEX_MOD_DISP_WDMA1, > }; > > +static const struct mtk_ddp_data mt2701_ddp_driver_data = { > + .mutex_mod = mt2701_mutex_mod, > +}; > + > +static const struct mtk_ddp_data mt2712_ddp_driver_data = { > + .mutex_mod = mt2712_mutex_mod, > +}; > + > +static const struct mtk_ddp_data mt8173_ddp_driver_data = { > + .mutex_mod = mt8173_mutex_mod, > +}; > + > static unsigned int mtk_ddp_mout_en(enum mtk_ddp_comp_id cur, > enum mtk_ddp_comp_id next, > unsigned int *addr) > @@ -464,15 +480,15 @@ void mtk_disp_mutex_add_comp(struct mtk_disp_mutex *mutex, > reg = MUTEX_SOF_DPI1; > break; > default: > - if (ddp->mutex_mod[id] < 32) { > + if (ddp->data->mutex_mod[id] < 32) { > offset = DISP_REG_MUTEX_MOD(mutex->id); > reg = readl_relaxed(ddp->regs + offset); > - reg |= 1 << ddp->mutex_mod[id]; > + reg |= 1 << ddp->data->mutex_mod[id]; > writel_relaxed(reg, ddp->regs + offset); > } else { > offset = DISP_REG_MUTEX_MOD2(mutex->id); > reg = readl_relaxed(ddp->regs + offset); > - reg |= 1 << (ddp->mutex_mod[id] - 32); > + reg |= 1 << (ddp->data->mutex_mod[id] - 32); > writel_relaxed(reg, ddp->regs + offset); > } > return; > @@ -502,15 +518,15 @@ void mtk_disp_mutex_remove_comp(struct mtk_disp_mutex *mutex, > ddp->regs + DISP_REG_MUTEX_SOF(mutex->id)); > break; > default: > - if (ddp->mutex_mod[id] < 32) { > + if (ddp->data->mutex_mod[id] < 32) { > offset = DISP_REG_MUTEX_MOD(mutex->id); > reg = readl_relaxed(ddp->regs + offset); > - reg &= ~(1 << ddp->mutex_mod[id]); > + reg &= ~(1 << ddp->data->mutex_mod[id]); > writel_relaxed(reg, ddp->regs + offset); > } else { > offset = DISP_REG_MUTEX_MOD2(mutex->id); > reg = readl_relaxed(ddp->regs + offset); > - reg &= ~(1 << (ddp->mutex_mod[id] - 32)); > + reg &= ~(1 << (ddp->data->mutex_mod[id] - 32)); > writel_relaxed(reg, ddp->regs + offset); > } > break; > @@ -585,7 +601,7 @@ static int mtk_ddp_probe(struct platform_device *pdev) > return PTR_ERR(ddp->regs); > } > > - ddp->mutex_mod = of_device_get_match_data(dev); > + ddp->data = of_device_get_match_data(dev); > > platform_set_drvdata(pdev, ddp); > > @@ -598,9 +614,12 @@ static int mtk_ddp_remove(struct platform_device *pdev) > } > > static const struct of_device_id ddp_driver_dt_match[] = { > - { .compatible = "mediatek,mt2701-disp-mutex", .data = mt2701_mutex_mod}, > - { .compatible = "mediatek,mt2712-disp-mutex", .data = mt2712_mutex_mod}, > - { .compatible = "mediatek,mt8173-disp-mutex", .data = mt8173_mutex_mod}, > + { .compatible = "mediatek,mt2701-disp-mutex", > + .data = &mt2701_ddp_driver_data}, > + { .compatible = "mediatek,mt2712-disp-mutex", > + .data = &mt2712_ddp_driver_data}, > + { .compatible = "mediatek,mt8173-disp-mutex", > + .data = &mt8173_ddp_driver_data}, > {}, > }; > MODULE_DEVICE_TABLE(of, ddp_driver_dt_match);