From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B3333C04AB5 for ; Thu, 6 Jun 2019 06:12:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 82BE02083D for ; Thu, 6 Jun 2019 06:12:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726599AbfFFGMi (ORCPT ); Thu, 6 Jun 2019 02:12:38 -0400 Received: from Mailgw01.mediatek.com ([1.203.163.78]:45403 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1725267AbfFFGMi (ORCPT ); Thu, 6 Jun 2019 02:12:38 -0400 X-UUID: a73ae1321c6046df80c67682ae788815-20190606 X-UUID: a73ae1321c6046df80c67682ae788815-20190606 Received: from mtkcas35.mediatek.inc [(172.27.4.253)] by mailgw01.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 485898404; Thu, 06 Jun 2019 14:12:31 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by MTKMBS31N2.mediatek.inc (172.27.4.87) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 6 Jun 2019 14:12:29 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Thu, 6 Jun 2019 14:12:29 +0800 Message-ID: <1559801548.20098.8.camel@mtksdaap41> Subject: Re: [PATCH v3, 08/27] drm/mediatek: add mutex sof into ddp private data From: CK Hu To: CC: Philipp Zabel , Rob Herring , Matthias Brugger , "David Airlie" , Daniel Vetter , Mark Rutland , , , , , Date: Thu, 6 Jun 2019 14:12:28 +0800 In-Reply-To: <1559734986-7379-9-git-send-email-yongqiang.niu@mediatek.com> References: <1559734986-7379-1-git-send-email-yongqiang.niu@mediatek.com> <1559734986-7379-9-git-send-email-yongqiang.niu@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Yongqiang: On Wed, 2019-06-05 at 19:42 +0800, yongqiang.niu@mediatek.com wrote: > From: Yongqiang Niu > > mutex sof will be ddp private data > > Signed-off-by: Yongqiang Niu > --- > drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 44 +++++++++++++++++++++++++++------- > 1 file changed, 36 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c > index 8bde2cf..e1a510f 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c > @@ -149,8 +149,20 @@ struct mtk_disp_mutex { > bool claimed; > }; > > +enum mtk_ddp_mutex_sof_id { > + DDP_MUTEX_SOF_SINGLE_MODE, > + DDP_MUTEX_SOF_DSI0, > + DDP_MUTEX_SOF_DSI1, > + DDP_MUTEX_SOF_DPI0, > + DDP_MUTEX_SOF_DPI1, > + DDP_MUTEX_SOF_DSI2, > + DDP_MUTEX_SOF_DSI3, > + DDP_MUTEX_SOF_MAX, DDP_MUTEX_SOF_MAX can be removed. Regards, CK > +}; > + > struct mtk_ddp_data { > const unsigned int *mutex_mod; > + const unsigned int *mutex_sof; > const unsigned int mutex_mod_reg; > }; > > @@ -209,18 +221,31 @@ struct mtk_ddp { > [DDP_COMPONENT_WDMA1] = MT8173_MUTEX_MOD_DISP_WDMA1, > }; > > +static const unsigned int mt2712_mutex_sof[DDP_MUTEX_SOF_MAX] = { > + [DDP_MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE, > + [DDP_MUTEX_SOF_DSI0] = MUTEX_SOF_DSI0, > + [DDP_MUTEX_SOF_DSI1] = MUTEX_SOF_DSI1, > + [DDP_MUTEX_SOF_DPI0] = MUTEX_SOF_DPI0, > + [DDP_MUTEX_SOF_DPI1] = MUTEX_SOF_DPI1, > + [DDP_MUTEX_SOF_DSI2] = MUTEX_SOF_DSI2, > + [DDP_MUTEX_SOF_DSI3] = MUTEX_SOF_DSI3, > +}; > + > static const struct mtk_ddp_data mt2701_ddp_driver_data = { > .mutex_mod = mt2701_mutex_mod, > + .mutex_sof = mt2712_mutex_sof, > .mutex_mod_reg = MT2701_DISP_MUTEX0_MOD0, > }; > > static const struct mtk_ddp_data mt2712_ddp_driver_data = { > .mutex_mod = mt2712_mutex_mod, > + .mutex_sof = mt2712_mutex_sof, > .mutex_mod_reg = MT2701_DISP_MUTEX0_MOD0, > }; > > static const struct mtk_ddp_data mt8173_ddp_driver_data = { > .mutex_mod = mt8173_mutex_mod, > + .mutex_sof = mt2712_mutex_sof, > .mutex_mod_reg = MT2701_DISP_MUTEX0_MOD0, > }; > > @@ -462,28 +487,29 @@ void mtk_disp_mutex_add_comp(struct mtk_disp_mutex *mutex, > struct mtk_ddp *ddp = container_of(mutex, struct mtk_ddp, > mutex[mutex->id]); > unsigned int reg; > + unsigned int sof_id; > unsigned int offset; > > WARN_ON(&ddp->mutex[mutex->id] != mutex); > > switch (id) { > case DDP_COMPONENT_DSI0: > - reg = MUTEX_SOF_DSI0; > + sof_id = DDP_MUTEX_SOF_DSI0; > break; > case DDP_COMPONENT_DSI1: > - reg = MUTEX_SOF_DSI0; > + sof_id = DDP_MUTEX_SOF_DSI0; > break; > case DDP_COMPONENT_DSI2: > - reg = MUTEX_SOF_DSI2; > + sof_id = DDP_MUTEX_SOF_DSI2; > break; > case DDP_COMPONENT_DSI3: > - reg = MUTEX_SOF_DSI3; > + sof_id = DDP_MUTEX_SOF_DSI3; > break; > case DDP_COMPONENT_DPI0: > - reg = MUTEX_SOF_DPI0; > + sof_id = DDP_MUTEX_SOF_DPI0; > break; > case DDP_COMPONENT_DPI1: > - reg = MUTEX_SOF_DPI1; > + sof_id = DDP_MUTEX_SOF_DPI1; > break; > default: > if (ddp->data->mutex_mod[id] < 32) { > @@ -501,7 +527,8 @@ void mtk_disp_mutex_add_comp(struct mtk_disp_mutex *mutex, > return; > } > > - writel_relaxed(reg, ddp->regs + DISP_REG_MUTEX_SOF(mutex->id)); > + writel_relaxed(ddp->data->mutex_sof[sof_id], > + ddp->regs + DISP_REG_MUTEX_SOF(mutex->id)); > } > > void mtk_disp_mutex_remove_comp(struct mtk_disp_mutex *mutex, > @@ -522,7 +549,8 @@ void mtk_disp_mutex_remove_comp(struct mtk_disp_mutex *mutex, > case DDP_COMPONENT_DPI0: > case DDP_COMPONENT_DPI1: > writel_relaxed(MUTEX_SOF_SINGLE_MODE, > - ddp->regs + DISP_REG_MUTEX_SOF(mutex->id)); > + ddp->regs + > + DISP_REG_MUTEX_SOF(mutex->id)); > break; > default: > if (ddp->data->mutex_mod[id] < 32) {