From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0D1B8C282DD for ; Mon, 10 Jun 2019 12:22:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E0DB520859 for ; Mon, 10 Jun 2019 12:22:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390046AbfFJMWT (ORCPT ); Mon, 10 Jun 2019 08:22:19 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:41783 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S2389705AbfFJMWQ (ORCPT ); Mon, 10 Jun 2019 08:22:16 -0400 X-UUID: b4a1c721529c42b7b3e473597c925790-20190610 X-UUID: b4a1c721529c42b7b3e473597c925790-20190610 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1303632265; Mon, 10 Jun 2019 20:22:12 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 10 Jun 2019 20:22:10 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 10 Jun 2019 20:22:10 +0800 From: Yong Wu To: Joerg Roedel , Matthias Brugger , Robin Murphy , Rob Herring CC: Evan Green , Tomasz Figa , Will Deacon , , , , , , , , , , Nicolas Boichat , , Matthias Kaehlcke Subject: [PATCH v7 20/21] iommu/mediatek: Fix iova_to_phys PA start for 4GB mode Date: Mon, 10 Jun 2019 20:17:59 +0800 Message-ID: <1560169080-27134-21-git-send-email-yong.wu@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1560169080-27134-1-git-send-email-yong.wu@mediatek.com> References: <1560169080-27134-1-git-send-email-yong.wu@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In the 4GB mode, the physical address is remapped, Here is the detailed remap relationship. CPU PA -> HW PA 0x4000_0000 0x1_4000_0000 (Add bit32) 0x8000_0000 0x1_8000_0000 ... 0xc000_0000 0x1_c000_0000 ... 0x1_0000_0000 0x1_0000_0000 (No change) Thus, we always add bit32 for PA when entering mtk_iommu_map. But in the iova_to_phys, the CPU don't need this bit32 if the PA is from 0x1_4000_0000 to 0x1_ffff_ffff. This patch discards the bit32 in this iova_to_phys in the 4GB mode. Fixes: 30e2fccf9512 ("iommu/mediatek: Enlarge the validate PA range for 4GB mode") Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index 67cab2d..34f2e40 100644 --- a/drivers/iommu/mtk_iommu.c +++ b/drivers/iommu/mtk_iommu.c @@ -119,6 +119,19 @@ struct mtk_iommu_domain { static const struct iommu_ops mtk_iommu_ops; +/* + * In M4U 4GB mode, the physical address is remapped as below: + * CPU PA -> M4U HW PA + * 0x4000_0000 0x1_4000_0000 (Add bit32) + * 0x8000_0000 0x1_8000_0000 ... + * 0xc000_0000 0x1_c000_0000 ... + * 0x1_0000_0000 0x1_0000_0000 (No change) + * + * Thus, We always add BIT32 in the iommu_map and disable BIT32 if PA is >= + * 0x1_4000_0000 in the iova_to_phys. + */ +#define MTK_IOMMU_4GB_MODE_PA_140000000 0x140000000UL + static LIST_HEAD(m4ulist); /* List all the M4U HWs */ #define for_each_m4u(data) list_for_each_entry(data, &m4ulist, list) @@ -415,6 +428,7 @@ static phys_addr_t mtk_iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova) { struct mtk_iommu_domain *dom = to_mtk_domain(domain); + struct mtk_iommu_data *data = mtk_iommu_get_m4u_data(); unsigned long flags; phys_addr_t pa; @@ -422,6 +436,10 @@ static phys_addr_t mtk_iommu_iova_to_phys(struct iommu_domain *domain, pa = dom->iop->iova_to_phys(dom->iop, iova); spin_unlock_irqrestore(&dom->pgtlock, flags); + if (data->plat_data->has_4gb_mode && data->dram_is_4gb && + pa >= MTK_IOMMU_4GB_MODE_PA_140000000) + pa &= ~BIT_ULL(32); + return pa; } -- 1.9.1