From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, UNPARSEABLE_RELAY,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9439CC31E44 for ; Fri, 14 Jun 2019 03:54:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6AA2820850 for ; Fri, 14 Jun 2019 03:54:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725851AbfFNDyk (ORCPT ); Thu, 13 Jun 2019 23:54:40 -0400 Received: from Mailgw01.mediatek.com ([1.203.163.78]:32498 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1725616AbfFNDyk (ORCPT ); Thu, 13 Jun 2019 23:54:40 -0400 X-UUID: c23474d189164252bd8c02aedc45fa34-20190614 X-UUID: c23474d189164252bd8c02aedc45fa34-20190614 Received: from mtkcas32.mediatek.inc [(172.27.4.253)] by mailgw01.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 708158386; Fri, 14 Jun 2019 11:54:32 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by MTKMBS31N1.mediatek.inc (172.27.4.69) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 14 Jun 2019 11:54:30 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Fri, 14 Jun 2019 11:54:30 +0800 Message-ID: <1560484470.16718.13.camel@mtksdaap41> Subject: Re: [PATCH v3, 14/27] drm/mediatek: add commponent OVL_2L0 From: CK Hu To: CC: Philipp Zabel , Rob Herring , Matthias Brugger , "David Airlie" , Daniel Vetter , Mark Rutland , , , , , Date: Fri, 14 Jun 2019 11:54:30 +0800 In-Reply-To: <1559734986-7379-15-git-send-email-yongqiang.niu@mediatek.com> References: <1559734986-7379-1-git-send-email-yongqiang.niu@mediatek.com> <1559734986-7379-15-git-send-email-yongqiang.niu@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Yongqiang: On Wed, 2019-06-05 at 19:42 +0800, yongqiang.niu@mediatek.com wrote: > From: Yongqiang Niu > > This patch add commponent OVL_2L0 Reviewed-by: CK Hu > > Signed-off-by: Yongqiang Niu > --- > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 ++ > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 2 ++ > 2 files changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c > index 310c0b9..8094926 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c > @@ -227,6 +227,7 @@ static void mtk_gamma_set(struct mtk_ddp_comp *comp, > > static const char * const mtk_ddp_comp_stem[MTK_DDP_COMP_TYPE_MAX] = { > [MTK_DISP_OVL] = "ovl", > + [MTK_DISP_OVL_2L] = "ovl_2l", > [MTK_DISP_RDMA] = "rdma", > [MTK_DISP_WDMA] = "wdma", > [MTK_DISP_COLOR] = "color", > @@ -266,6 +267,7 @@ struct mtk_ddp_comp_match { > [DDP_COMPONENT_OD1] = { MTK_DISP_OD, 1, &ddp_od }, > [DDP_COMPONENT_OVL0] = { MTK_DISP_OVL, 0, NULL }, > [DDP_COMPONENT_OVL1] = { MTK_DISP_OVL, 1, NULL }, > + [DDP_COMPONENT_OVL_2L0] = { MTK_DISP_OVL_2L, 0, NULL }, > [DDP_COMPONENT_PWM0] = { MTK_DISP_PWM, 0, NULL }, > [DDP_COMPONENT_PWM1] = { MTK_DISP_PWM, 1, NULL }, > [DDP_COMPONENT_PWM2] = { MTK_DISP_PWM, 2, NULL }, > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h > index 87ef290..a81c322 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h > @@ -25,6 +25,7 @@ > > enum mtk_ddp_comp_type { > MTK_DISP_OVL, > + MTK_DISP_OVL_2L, > MTK_DISP_RDMA, > MTK_DISP_WDMA, > MTK_DISP_COLOR, > @@ -58,6 +59,7 @@ enum mtk_ddp_comp_id { > DDP_COMPONENT_OD0, > DDP_COMPONENT_OD1, > DDP_COMPONENT_OVL0, > + DDP_COMPONENT_OVL_2L0, > DDP_COMPONENT_OVL1, > DDP_COMPONENT_PWM0, > DDP_COMPONENT_PWM1,