From: Wei Wang <wei.w.wang@intel.com>
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
pbonzini@redhat.com, ak@linux.intel.com, peterz@infradead.org
Cc: kan.liang@intel.com, mingo@redhat.com, rkrcmar@redhat.com,
like.xu@intel.com, wei.w.wang@intel.com, jannh@google.com,
arei.gonglei@huawei.com, jmattson@google.com
Subject: [PATCH v7 07/12] perf/x86: no counter allocation support
Date: Mon, 8 Jul 2019 09:23:14 +0800 [thread overview]
Message-ID: <1562548999-37095-8-git-send-email-wei.w.wang@intel.com> (raw)
In-Reply-To: <1562548999-37095-1-git-send-email-wei.w.wang@intel.com>
In some cases, an event may be created without needing a counter
allocation. For example, an lbr event may be created by the host
only to help save/restore the lbr stack on the vCPU context switching.
This patch adds a new interface to allow users to create a perf event
without the need of counter assignment.
Signed-off-by: Wei Wang <wei.w.wang@intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
---
arch/x86/events/core.c | 12 ++++++++++++
include/linux/perf_event.h | 13 +++++++++++++
kernel/events/core.c | 37 +++++++++++++++++++++++++------------
3 files changed, 50 insertions(+), 12 deletions(-)
diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
index f315425..eebbd65 100644
--- a/arch/x86/events/core.c
+++ b/arch/x86/events/core.c
@@ -410,6 +410,9 @@ int x86_setup_perfctr(struct perf_event *event)
struct hw_perf_event *hwc = &event->hw;
u64 config;
+ if (is_no_counter_event(event))
+ return 0;
+
if (!is_sampling_event(event)) {
hwc->sample_period = x86_pmu.max_period;
hwc->last_period = hwc->sample_period;
@@ -1248,6 +1251,12 @@ static int x86_pmu_add(struct perf_event *event, int flags)
hwc = &event->hw;
n0 = cpuc->n_events;
+
+ if (is_no_counter_event(event)) {
+ n = n0;
+ goto done_collect;
+ }
+
ret = n = collect_events(cpuc, event, false);
if (ret < 0)
goto out;
@@ -1422,6 +1431,9 @@ static void x86_pmu_del(struct perf_event *event, int flags)
if (cpuc->txn_flags & PERF_PMU_TXN_ADD)
goto do_del;
+ if (is_no_counter_event(event))
+ goto do_del;
+
/*
* Not a TXN, therefore cleanup properly.
*/
diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
index 0ab99c7..19e6593 100644
--- a/include/linux/perf_event.h
+++ b/include/linux/perf_event.h
@@ -528,6 +528,7 @@ typedef void (*perf_overflow_handler_t)(struct perf_event *,
*/
#define PERF_EV_CAP_SOFTWARE BIT(0)
#define PERF_EV_CAP_READ_ACTIVE_PKG BIT(1)
+#define PERF_EV_CAP_NO_COUNTER BIT(2)
#define SWEVENT_HLIST_BITS 8
#define SWEVENT_HLIST_SIZE (1 << SWEVENT_HLIST_BITS)
@@ -895,6 +896,13 @@ extern int perf_event_refresh(struct perf_event *event, int refresh);
extern void perf_event_update_userpage(struct perf_event *event);
extern int perf_event_release_kernel(struct perf_event *event);
extern struct perf_event *
+perf_event_create(struct perf_event_attr *attr,
+ int cpu,
+ struct task_struct *task,
+ perf_overflow_handler_t overflow_handler,
+ void *context,
+ bool counter_assignment);
+extern struct perf_event *
perf_event_create_kernel_counter(struct perf_event_attr *attr,
int cpu,
struct task_struct *task,
@@ -1032,6 +1040,11 @@ static inline bool is_sampling_event(struct perf_event *event)
return event->attr.sample_period != 0;
}
+static inline bool is_no_counter_event(struct perf_event *event)
+{
+ return !!(event->event_caps & PERF_EV_CAP_NO_COUNTER);
+}
+
/*
* Return 1 for a software event, 0 for a hardware event
*/
diff --git a/kernel/events/core.c b/kernel/events/core.c
index abbd4b3..70884df 100644
--- a/kernel/events/core.c
+++ b/kernel/events/core.c
@@ -11162,18 +11162,10 @@ SYSCALL_DEFINE5(perf_event_open,
return err;
}
-/**
- * perf_event_create_kernel_counter
- *
- * @attr: attributes of the counter to create
- * @cpu: cpu in which the counter is bound
- * @task: task to profile (NULL for percpu)
- */
-struct perf_event *
-perf_event_create_kernel_counter(struct perf_event_attr *attr, int cpu,
- struct task_struct *task,
- perf_overflow_handler_t overflow_handler,
- void *context)
+struct perf_event *perf_event_create(struct perf_event_attr *attr, int cpu,
+ struct task_struct *task,
+ perf_overflow_handler_t overflow_handler,
+ void *context, bool need_counter)
{
struct perf_event_context *ctx;
struct perf_event *event;
@@ -11193,6 +11185,9 @@ perf_event_create_kernel_counter(struct perf_event_attr *attr, int cpu,
/* Mark owner so we could distinguish it from user events. */
event->owner = TASK_TOMBSTONE;
+ if (!need_counter)
+ event->event_caps |= PERF_EV_CAP_NO_COUNTER;
+
ctx = find_get_context(event->pmu, task, event);
if (IS_ERR(ctx)) {
err = PTR_ERR(ctx);
@@ -11241,6 +11236,24 @@ perf_event_create_kernel_counter(struct perf_event_attr *attr, int cpu,
err:
return ERR_PTR(err);
}
+EXPORT_SYMBOL_GPL(perf_event_create);
+
+/**
+ * perf_event_create_kernel_counter
+ *
+ * @attr: attributes of the counter to create
+ * @cpu: cpu in which the counter is bound
+ * @task: task to profile (NULL for percpu)
+ */
+struct perf_event *
+perf_event_create_kernel_counter(struct perf_event_attr *attr, int cpu,
+ struct task_struct *task,
+ perf_overflow_handler_t overflow_handler,
+ void *context)
+{
+ return perf_event_create(attr, cpu, task, overflow_handler,
+ context, true);
+}
EXPORT_SYMBOL_GPL(perf_event_create_kernel_counter);
void perf_pmu_migrate_context(struct pmu *pmu, int src_cpu, int dst_cpu)
--
2.7.4
next prev parent reply other threads:[~2019-07-08 2:06 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-08 1:23 [PATCH v7 00/12] Guest LBR Enabling Wei Wang
2019-07-08 1:23 ` [PATCH v7 01/12] perf/x86: fix the variable type of the LBR MSRs Wei Wang
2019-07-08 1:23 ` [PATCH v7 02/12] perf/x86: add a function to get the lbr stack Wei Wang
2019-07-08 1:23 ` [PATCH v7 03/12] KVM/x86: KVM_CAP_X86_GUEST_LBR Wei Wang
2019-07-08 1:23 ` [PATCH v7 04/12] KVM/x86: intel_pmu_lbr_enable Wei Wang
2019-07-08 1:23 ` [PATCH v7 05/12] KVM/x86/vPMU: tweak kvm_pmu_get_msr Wei Wang
2019-07-08 1:23 ` [PATCH v7 06/12] KVM/x86: expose MSR_IA32_PERF_CAPABILITIES to the guest Wei Wang
2019-07-08 1:23 ` Wei Wang [this message]
2019-07-08 14:29 ` [PATCH v7 07/12] perf/x86: no counter allocation support Peter Zijlstra
2019-07-09 2:58 ` Wei Wang
2019-07-09 9:43 ` Peter Zijlstra
2019-07-09 11:36 ` Wei Wang
2019-07-08 1:23 ` [PATCH v7 08/12] KVM/x86/vPMU: Add APIs to support host save/restore the guest lbr stack Wei Wang
2019-07-08 14:48 ` Peter Zijlstra
2019-07-09 3:04 ` Wei Wang
2019-07-09 9:39 ` Peter Zijlstra
2019-07-09 11:34 ` Wei Wang
2019-07-09 12:19 ` Peter Zijlstra
2019-07-10 8:19 ` Wei Wang
2019-07-09 11:45 ` Peter Zijlstra
2019-07-10 8:21 ` Wei Wang
2019-07-08 1:23 ` [PATCH v7 09/12] perf/x86: save/restore LBR_SELECT on vCPU switching Wei Wang
2019-07-08 1:23 ` [PATCH v7 10/12] KVM/x86/lbr: lazy save the guest lbr stack Wei Wang
2019-07-08 14:53 ` Peter Zijlstra
2019-07-08 15:11 ` Andi Kleen
2019-07-09 11:39 ` Peter Zijlstra
2019-07-09 3:14 ` Wei Wang
2019-07-08 1:23 ` [PATCH v7 11/12] KVM/x86: remove the common handling of the debugctl msr Wei Wang
2019-07-08 1:23 ` [PATCH v7 12/12] KVM/VMX/vPMU: support to report GLOBAL_STATUS_LBRS_FROZEN Wei Wang
2019-07-08 15:09 ` Peter Zijlstra
2019-07-09 3:24 ` Wei Wang
2019-07-09 11:35 ` Peter Zijlstra
2019-07-10 9:23 ` Wei Wang
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