* [PATCHv2] arm64: dts: agilex: add QSPI support for Intel Agilex
@ 2019-10-16 9:40 Ooi, Joyce
2019-10-18 1:00 ` Ley Foon Tan
0 siblings, 1 reply; 3+ messages in thread
From: Ooi, Joyce @ 2019-10-16 9:40 UTC (permalink / raw)
To: Dinh Nguyen, Rob Herring, Mark Rutland
Cc: devicetree, linux-kernel, Joyce Ooi, Ong Hean Loong,
See Chin Liang, Tan Ley Foon
This patch adds QSPI flash interface in device tree for Intel Agilex
Signed-off-by: Ooi, Joyce <joyce.ooi@intel.com>
---
v2: update the qspi_rootfs partition size
---
arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts | 35 ++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
index 7814a9e..8de8118 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
@@ -73,3 +73,38 @@
&watchdog0 {
status = "okay";
};
+
+&qspi {
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "mt25qu02g";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+
+ m25p,fast-read;
+ cdns,page-size = <256>;
+ cdns,block-size = <16>;
+ cdns,read-delay = <1>;
+ cdns,tshsl-ns = <50>;
+ cdns,tsd2d-ns = <50>;
+ cdns,tchsh-ns = <4>;
+ cdns,tslch-ns = <4>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ qspi_boot: partition@0 {
+ label = "Boot and fpga data";
+ reg = <0x0 0x034B0000>;
+ };
+
+ qspi_rootfs: partition@34B0000 {
+ label = "Root Filesystem - JFFS2";
+ reg = <0x034B0000 0x0CB50000>;
+ };
+ };
+ };
+};
--
1.9.1
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCHv2] arm64: dts: agilex: add QSPI support for Intel Agilex
2019-10-16 9:40 [PATCHv2] arm64: dts: agilex: add QSPI support for Intel Agilex Ooi, Joyce
@ 2019-10-18 1:00 ` Ley Foon Tan
2019-10-22 3:42 ` Dinh Nguyen
0 siblings, 1 reply; 3+ messages in thread
From: Ley Foon Tan @ 2019-10-18 1:00 UTC (permalink / raw)
To: Ooi, Joyce, Dinh Nguyen, Rob Herring, Mark Rutland
Cc: devicetree, linux-kernel, Ong Hean Loong, See Chin Liang
On Wed, 2019-10-16 at 02:40 -0700, Ooi, Joyce wrote:
> This patch adds QSPI flash interface in device tree for Intel Agilex
>
> Signed-off-by: Ooi, Joyce <joyce.ooi@intel.com>
> ---
> v2: update the qspi_rootfs partition size
> ---
> arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts | 35
> ++++++++++++++++++++++
> 1 file changed, 35 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
> b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
> index 7814a9e..8de8118 100644
> --- a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
> @@ -73,3 +73,38 @@
> &watchdog0 {
> status = "okay";
> };
> +
> +&qspi {
> + flash@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "mt25qu02g";
> + reg = <0>;
> + spi-max-frequency = <50000000>;
QSPI can support up to 100MHz.
> +
> + m25p,fast-read;
> + cdns,page-size = <256>;
> + cdns,block-size = <16>;
> + cdns,read-delay = <1>;
> + cdns,tshsl-ns = <50>;
> + cdns,tsd2d-ns = <50>;
> + cdns,tchsh-ns = <4>;
> + cdns,tslch-ns = <4>;
> +
> + partitions {
> + compatible = "fixed-partitions";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + qspi_boot: partition@0 {
> + label = "Boot and fpga data";
> + reg = <0x0 0x034B0000>;
> + };
> +
> + qspi_rootfs: partition@34B0000 {
> + label = "Root Filesystem - JFFS2";
> + reg = <0x034B0000 0x0CB50000>;
> + };
> + };
> + };
> +};
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCHv2] arm64: dts: agilex: add QSPI support for Intel Agilex
2019-10-18 1:00 ` Ley Foon Tan
@ 2019-10-22 3:42 ` Dinh Nguyen
0 siblings, 0 replies; 3+ messages in thread
From: Dinh Nguyen @ 2019-10-22 3:42 UTC (permalink / raw)
To: Ley Foon Tan, Ooi, Joyce, Rob Herring, Mark Rutland
Cc: devicetree, linux-kernel, Ong Hean Loong, See Chin Liang
On 10/17/19 8:00 PM, Ley Foon Tan wrote:
> On Wed, 2019-10-16 at 02:40 -0700, Ooi, Joyce wrote:
>> This patch adds QSPI flash interface in device tree for Intel Agilex
>>
>> Signed-off-by: Ooi, Joyce <joyce.ooi@intel.com>
>> ---
>> v2: update the qspi_rootfs partition size
>> ---
>> arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts | 35
>> ++++++++++++++++++++++
>> 1 file changed, 35 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
>> b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
>> index 7814a9e..8de8118 100644
>> --- a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
>> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
>> @@ -73,3 +73,38 @@
>> &watchdog0 {
>> status = "okay";
>> };
>> +
>> +&qspi {
>> + flash@0 {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + compatible = "mt25qu02g";
>> + reg = <0>;
>> + spi-max-frequency = <50000000>;
> QSPI can support up to 100MHz.
I've updated the patch accordingly.
Dinh
^ permalink raw reply [flat|nested] 3+ messages in thread
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2019-10-16 9:40 [PATCHv2] arm64: dts: agilex: add QSPI support for Intel Agilex Ooi, Joyce
2019-10-18 1:00 ` Ley Foon Tan
2019-10-22 3:42 ` Dinh Nguyen
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