From: Weiyi Lu <weiyi.lu@mediatek.com>
To: Nicolas Boichat <drinkcat@chromium.org>
Cc: Matthias Brugger <matthias.bgg@gmail.com>,
Rob Herring <robh@kernel.org>,
James Liao <jamesjj.liao@mediatek.com>,
Fan Chen <fan.chen@mediatek.com>,
linux-arm Mailing List <linux-arm-kernel@lists.infradead.org>,
lkml <linux-kernel@vger.kernel.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@lists.infradead.org>,
srv_heupstream <srv_heupstream@mediatek.com>,
Yong Wu <yong.wu@mediatek.com>
Subject: Re: [PATCH v9 4/9] soc: mediatek: Add multiple step bus protection control
Date: Tue, 17 Dec 2019 10:50:56 +0800 [thread overview]
Message-ID: <1576551056.14035.19.camel@mtksdaap41> (raw)
In-Reply-To: <CANMq1KA4KL=ZpU=cQtw3LV79DKRdG3Eb16og6vU1SdsnnL=0CA@mail.gmail.com>
On Mon, 2019-12-16 at 15:21 +0800, Nicolas Boichat wrote:
> On Tue, Dec 10, 2019 at 2:47 PM Weiyi Lu <weiyi.lu@mediatek.com> wrote:
> >
> > Both MT8183 & MT6765 have more control steps of bus protection
> > than previous project. And there add more bus protection registers
> > reside at infracfg & smi-common. Also add new APIs for multiple
> > step bus protection control with more customized arguments.
> >
> > Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
> > ---
> > drivers/soc/mediatek/Makefile | 2 +-
> > drivers/soc/mediatek/mtk-scpsys-ext.c | 99 +++++++++++++++++++++++++++++++++
> > drivers/soc/mediatek/mtk-scpsys.c | 39 +++++++++----
> > include/linux/soc/mediatek/scpsys-ext.h | 39 +++++++++++++
> > 4 files changed, 168 insertions(+), 11 deletions(-)
> > create mode 100644 drivers/soc/mediatek/mtk-scpsys-ext.c
> > create mode 100644 include/linux/soc/mediatek/scpsys-ext.h
> >
> > diff --git a/drivers/soc/mediatek/Makefile b/drivers/soc/mediatek/Makefile
> > index b017330..b442be9 100644
> > --- a/drivers/soc/mediatek/Makefile
> > +++ b/drivers/soc/mediatek/Makefile
> > @@ -1,5 +1,5 @@
> > # SPDX-License-Identifier: GPL-2.0-only
> > obj-$(CONFIG_MTK_CMDQ) += mtk-cmdq-helper.o
> > -obj-$(CONFIG_MTK_INFRACFG) += mtk-infracfg.o
> > +obj-$(CONFIG_MTK_INFRACFG) += mtk-infracfg.o mtk-scpsys-ext.o
> > obj-$(CONFIG_MTK_PMIC_WRAP) += mtk-pmic-wrap.o
> > obj-$(CONFIG_MTK_SCPSYS) += mtk-scpsys.o
> > diff --git a/drivers/soc/mediatek/mtk-scpsys-ext.c b/drivers/soc/mediatek/mtk-scpsys-ext.c
> > new file mode 100644
> > index 0000000..4f1adda
> > --- /dev/null
> > +++ b/drivers/soc/mediatek/mtk-scpsys-ext.c
> > @@ -0,0 +1,99 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (c) 2018 MediaTek Inc.
> > + * Author: Owen Chen <Owen.Chen@mediatek.com>
> > + */
> > +#include <linux/ktime.h>
> > +#include <linux/mfd/syscon.h>
> > +#include <linux/of_device.h>
> > +#include <linux/regmap.h>
> > +#include <linux/soc/mediatek/scpsys-ext.h>
> > +
> > +#define MTK_POLL_DELAY_US 10
> > +#define MTK_POLL_TIMEOUT USEC_PER_SEC
> > +
> > +static int set_bus_protection(struct regmap *map, u32 mask, u32 ack_mask,
> > + u32 reg_set, u32 reg_sta, u32 reg_en)
> > +{
> > + u32 val;
> > +
> > + if (reg_set)
> > + regmap_write(map, reg_set, mask);
> > + else
> > + regmap_update_bits(map, reg_en, mask, mask);
>
> At least for 8183, we never seen to use the reg_set case, can we
> simplify this function?
>
Actually 6765 will use it and all the other MediaTek chips at least in
near future.
https://patchwork.kernel.org/patch/11042003/
> > +
> > + return regmap_read_poll_timeout(map, reg_sta,
> > + val, (val & ack_mask) == ack_mask,
> > + MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT);
>
> From 8183, I see that you have either:
> 1. mask == ack_mask
> 2. ack_mask == 0 (essentially this skips this test)
>
> Would it be simpler to just skip this test if reg_sta == 0, and always
> assume mask == ack_mask otherwise?
>
> e.g.
> if (reg_sta == 0)
> return 0;
>
> return regmap_read_poll_timeout(map, reg_sta,
> val, (val & mask) == mask,
> MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT);
>
I'm not sure if you mean ack_mask == 0?
reg_sta would be possible to be 0 because it's a register address
offset.
I guess what you'd actually suggest is like below?
if (ack_mask == 0)
return 0;
return regmap_read_poll_timeout(map, reg_sta,
val, (val & mask) == mask,
MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT);
> > +}
> > +
> > [snip]
> > +
> > +int mtk_scpsys_ext_set_bus_protection(const struct bus_prot *bp_table,
> > + struct regmap *infracfg, struct regmap *smi_common)
> > +{
> > + int i;
> > +
> > + for (i = 0; i < MAX_STEPS; i++) {
> > + struct regmap *map = NULL;
> > + int ret;
> > +
> > + if (bp_table[i].type == INVALID_TYPE)
> > + continue;
>
> break? (but yes the one below in mtk_scpsys_ext_clear_bus_protection
> has to be continue).
>
Thanks. I'll fix in next version.
> > + else if (bp_table[i].type == IFR_TYPE)
> > + map = infracfg;
> > + else if (bp_table[i].type == SMI_TYPE)
> > + map = smi_common;
> > +
> > + ret = set_bus_protection(map,
> > + bp_table[i].mask, bp_table[i].mask,
> > + bp_table[i].set_ofs, bp_table[i].sta_ofs,
> > + bp_table[i].en_ofs);
> > +
> > + if (ret)
> > + return ret;
> > + }
> > +
> > + return 0;
> > +}
> > +
> > +int mtk_scpsys_ext_clear_bus_protection(const struct bus_prot *bp_table,
> > + struct regmap *infracfg, struct regmap *smi_common)
> > +{
> > + int i;
> > +
> > + for (i = MAX_STEPS - 1; i >= 0; i--) {
> > + struct regmap *map = NULL;
> > + int ret;
> > +
> > + if (bp_table[i].type == INVALID_TYPE)
> > + continue;
> > + else if (bp_table[i].type == IFR_TYPE)
> > + map = infracfg;
> > + else if (bp_table[i].type == SMI_TYPE)
> > + map = smi_common;
> > +
> > + ret = clear_bus_protection(map,
> > + bp_table[i].mask, bp_table[i].clr_ack_mask,
> > + bp_table[i].clr_ofs, bp_table[i].sta_ofs,
> > + bp_table[i].en_ofs);
> > +
> > + if (ret)
> > + return ret;
> > + }
> > +
> > + return 0;
> > +}
> > diff --git a/drivers/soc/mediatek/mtk-scpsys.c b/drivers/soc/mediatek/mtk-scpsys.c
> > index 915d635..466bb749 100644
> > --- a/drivers/soc/mediatek/mtk-scpsys.c
> > +++ b/drivers/soc/mediatek/mtk-scpsys.c
> > @@ -12,6 +12,7 @@
> > #include <linux/pm_domain.h>
> > #include <linux/regulator/consumer.h>
> > #include <linux/soc/mediatek/infracfg.h>
> > +#include <linux/soc/mediatek/scpsys-ext.h>
> >
> > #include <dt-bindings/power/mt2701-power.h>
> > #include <dt-bindings/power/mt2712-power.h>
> > @@ -120,6 +121,7 @@ enum clk_id {
> > * @basic_clk_id: provide the same purpose with field "clk_id"
> > * by declaring basic clock prefix name rather than clk_id.
> > * @caps: The flag for active wake-up action.
> > + * @bp_table: The mask table for multiple step bus protection.
> > */
> > struct scp_domain_data {
> > const char *name;
> > @@ -131,6 +133,7 @@ struct scp_domain_data {
> > enum clk_id clk_id[MAX_CLKS];
> > const char *basic_clk_id[MAX_CLKS];
> > u8 caps;
> > + struct bus_prot bp_table[MAX_STEPS];
>
> As with the previous patch, I'm not a big fan of having 2 approaches
> for something similar (bus_prot_mask vs bp_table), can we define a
> simple macro for this?
> e.g.:
> .bp_table = BUS_PROT_SINGLE(mask)
Agree! I'll fix it.
next prev parent reply other threads:[~2019-12-17 2:51 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-10 6:46 [PATCH v9 0/9] Mediatek MT8183 scpsys support Weiyi Lu
2019-12-10 6:46 ` [PATCH v9 1/9] dt-bindings: mediatek: Add property to mt8183 smi-common Weiyi Lu
2019-12-10 6:46 ` [PATCH v9 2/9] dt-bindings: soc: Add MT8183 power dt-bindings Weiyi Lu
2019-12-10 6:46 ` [PATCH v9 3/9] soc: mediatek: Add basic_clk_id to scp_power_data Weiyi Lu
2019-12-16 7:01 ` Nicolas Boichat
2019-12-17 2:50 ` Weiyi Lu
2019-12-10 6:46 ` [PATCH v9 4/9] soc: mediatek: Add multiple step bus protection control Weiyi Lu
2019-12-16 7:21 ` Nicolas Boichat
2019-12-17 2:50 ` Weiyi Lu [this message]
2019-12-17 5:33 ` Nicolas Boichat
2019-12-18 2:25 ` Weiyi Lu
2019-12-19 3:42 ` Nicolas Boichat
2019-12-10 6:46 ` [PATCH v9 5/9] soc: mediatek: Add subsys clock control for bus protection Weiyi Lu
2019-12-16 7:26 ` Nicolas Boichat
2019-12-10 6:46 ` [PATCH v9 6/9] soc: mediatek: Add extra sram control Weiyi Lu
2019-12-16 7:28 ` Nicolas Boichat
2019-12-10 6:46 ` [PATCH v9 7/9] soc: mediatek: Add MT8183 scpsys support Weiyi Lu
2019-12-16 7:42 ` Nicolas Boichat
2019-12-10 6:46 ` [PATCH v9 8/9] arm64: dts: Add power controller device node of MT8183 Weiyi Lu
2019-12-10 6:46 ` [PATCH v9 9/9] arm64: dts: Add power-domains properity to mfgcfg Weiyi Lu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1576551056.14035.19.camel@mtksdaap41 \
--to=weiyi.lu@mediatek.com \
--cc=drinkcat@chromium.org \
--cc=fan.chen@mediatek.com \
--cc=jamesjj.liao@mediatek.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=matthias.bgg@gmail.com \
--cc=robh@kernel.org \
--cc=srv_heupstream@mediatek.com \
--cc=yong.wu@mediatek.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox