From: Elliot Berman <eberman@codeaurora.org>
To: Bjorn Andersson <bjorn.andersson@linaro.org>,
agross@kernel.org, swboyd@chromium.org,
Stephan Gerhold <stephan@gerhold.net>
Cc: Elliot Berman <eberman@codeaurora.org>,
saiprakash.ranjan@codeaurora.org, tsoni@codeaurora.org,
sidgup@codeaurora.org, psodagud@codeaurora.org,
Brian Masney <masneyb@onstation.org>,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v5 14/17] firmware: qcom_scm-32: Add device argument to atomic calls
Date: Tue, 7 Jan 2020 13:04:23 -0800 [thread overview]
Message-ID: <1578431066-19600-15-git-send-email-eberman@codeaurora.org> (raw)
In-Reply-To: <1578431066-19600-1-git-send-email-eberman@codeaurora.org>
Add unused "device" parameter to reduce merge friction between SMCCC and
legacy based conventions in an upcoming patch.
Change-Id: Ie31b220d751ae08430b3e89d41de0217e5213435
Tested-by: Brian Masney <masneyb@onstation.org> # arm32
Tested-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
---
drivers/firmware/qcom_scm-32.c | 18 ++++++++++--------
drivers/firmware/qcom_scm-64.c | 5 +++--
drivers/firmware/qcom_scm.c | 5 +++--
drivers/firmware/qcom_scm.h | 5 +++--
4 files changed, 19 insertions(+), 14 deletions(-)
diff --git a/drivers/firmware/qcom_scm-32.c b/drivers/firmware/qcom_scm-32.c
index 9729a8a..e9b396c 100644
--- a/drivers/firmware/qcom_scm-32.c
+++ b/drivers/firmware/qcom_scm-32.c
@@ -285,7 +285,8 @@ static int qcom_scm_call(struct device *dev, const struct qcom_scm_desc *desc,
* This shall only be used with commands that are guaranteed to be
* uninterruptable, atomic and SMP safe.
*/
-static int qcom_scm_call_atomic(const struct qcom_scm_desc *desc,
+static int qcom_scm_call_atomic(struct device *unused,
+ const struct qcom_scm_desc *desc,
struct qcom_scm_res *res)
{
int context_id;
@@ -316,7 +317,8 @@ static int qcom_scm_call_atomic(const struct qcom_scm_desc *desc,
* Set the cold boot address of the cpus. Any cpu outside the supported
* range would be removed from the cpu present mask.
*/
-int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
+int __qcom_scm_set_cold_boot_addr(struct device *dev, void *entry,
+ const cpumask_t *cpus)
{
int flags = 0;
int cpu;
@@ -345,7 +347,7 @@ int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
desc.args[1] = virt_to_phys(entry);
desc.arginfo = QCOM_SCM_ARGS(2);
- return qcom_scm_call_atomic(&desc, NULL);
+ return qcom_scm_call_atomic(dev, &desc, NULL);
}
/**
@@ -402,7 +404,7 @@ int __qcom_scm_set_warm_boot_addr(struct device *dev, void *entry,
* the control would return from this function, otherwise, the cpu jumps to the
* warm boot entry point set for this cpu upon reset.
*/
-void __qcom_scm_cpu_power_down(u32 flags)
+void __qcom_scm_cpu_power_down(struct device *dev, u32 flags)
{
struct qcom_scm_desc desc = {
.svc = QCOM_SCM_SVC_BOOT,
@@ -411,7 +413,7 @@ void __qcom_scm_cpu_power_down(u32 flags)
.arginfo = QCOM_SCM_ARGS(1),
};
- qcom_scm_call_atomic(&desc, NULL);
+ qcom_scm_call_atomic(dev, &desc, NULL);
}
int __qcom_scm_is_call_available(struct device *dev, u32 svc_id, u32 cmd_id)
@@ -616,7 +618,7 @@ int __qcom_scm_set_dload_mode(struct device *dev, bool enable)
desc.args[1] = enable ? QCOM_SCM_BOOT_SET_DLOAD_MODE : 0;
desc.arginfo = QCOM_SCM_ARGS(2);
- return qcom_scm_call_atomic(&desc, NULL);
+ return qcom_scm_call_atomic(dev, &desc, NULL);
}
int __qcom_scm_set_remote_state(struct device *dev, u32 state, u32 id)
@@ -687,7 +689,7 @@ int __qcom_scm_io_readl(struct device *dev, phys_addr_t addr,
desc.args[0] = addr;
desc.arginfo = QCOM_SCM_ARGS(1);
- ret = qcom_scm_call_atomic(&desc, &res);
+ ret = qcom_scm_call_atomic(dev, &desc, &res);
if (ret >= 0)
*val = res.result[0];
@@ -705,7 +707,7 @@ int __qcom_scm_io_writel(struct device *dev, phys_addr_t addr, unsigned int val)
desc.args[1] = val;
desc.arginfo = QCOM_SCM_ARGS(2);
- return qcom_scm_call_atomic(&desc, NULL);
+ return qcom_scm_call_atomic(dev, &desc, NULL);
}
int __qcom_scm_qsmmu500_wait_safe_toggle(struct device *dev, bool enable)
diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c
index 6bc7f69..9507047 100644
--- a/drivers/firmware/qcom_scm-64.c
+++ b/drivers/firmware/qcom_scm-64.c
@@ -239,7 +239,8 @@ static int qcom_scm_call_atomic(struct device *dev,
* Set the cold boot address of the cpus. Any cpu outside the supported
* range would be removed from the cpu present mask.
*/
-int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
+int __qcom_scm_set_cold_boot_addr(struct device *dev, void *entry,
+ const cpumask_t *cpus)
{
return -ENOTSUPP;
}
@@ -267,7 +268,7 @@ int __qcom_scm_set_warm_boot_addr(struct device *dev, void *entry,
* the control would return from this function, otherwise, the cpu jumps to the
* warm boot entry point set for this cpu upon reset.
*/
-void __qcom_scm_cpu_power_down(u32 flags)
+void __qcom_scm_cpu_power_down(struct device *dev, u32 flags)
{
}
diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c
index 097f8b3..5efe729 100644
--- a/drivers/firmware/qcom_scm.c
+++ b/drivers/firmware/qcom_scm.c
@@ -94,7 +94,8 @@ static void qcom_scm_clk_disable(void)
*/
int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
{
- return __qcom_scm_set_cold_boot_addr(entry, cpus);
+ return __qcom_scm_set_cold_boot_addr(__scm ? __scm->dev : NULL, entry,
+ cpus);
}
EXPORT_SYMBOL(qcom_scm_set_cold_boot_addr);
@@ -122,7 +123,7 @@ EXPORT_SYMBOL(qcom_scm_set_warm_boot_addr);
*/
void qcom_scm_cpu_power_down(u32 flags)
{
- __qcom_scm_cpu_power_down(flags);
+ __qcom_scm_cpu_power_down(__scm ? __scm->dev : NULL, flags);
}
EXPORT_SYMBOL(qcom_scm_cpu_power_down);
diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h
index afcca16..a022556 100644
--- a/drivers/firmware/qcom_scm.h
+++ b/drivers/firmware/qcom_scm.h
@@ -13,11 +13,12 @@ extern int __qcom_scm_set_dload_mode(struct device *dev, bool enable);
extern int __qcom_scm_set_warm_boot_addr(struct device *dev, void *entry,
const cpumask_t *cpus);
-extern int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus);
+extern int __qcom_scm_set_cold_boot_addr(struct device *dev, void *entry,
+ const cpumask_t *cpus);
#define QCOM_SCM_BOOT_TERMINATE_PC 0x2
#define QCOM_SCM_FLUSH_FLAG_MASK 0x3
-extern void __qcom_scm_cpu_power_down(u32 flags);
+extern void __qcom_scm_cpu_power_down(struct device *dev, u32 flags);
#define QCOM_SCM_SVC_IO 0x5
#define QCOM_SCM_IO_READ 0x1
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2020-01-07 21:05 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-07 21:04 [PATCH v5 00/17] Restructure, improve target support for qcom_scm driver Elliot Berman
2020-01-07 21:04 ` [PATCH v5 01/17] firmware: qcom_scm: Rename macros and structures Elliot Berman
2020-01-07 21:04 ` [PATCH v5 02/17] firmware: qcom_scm: Apply consistent naming scheme to command IDs Elliot Berman
2020-01-07 21:04 ` [PATCH v5 03/17] firmware: qcom_scm: Remove unused qcom_scm_get_version Elliot Berman
2020-01-07 21:04 ` [PATCH v5 04/17] firmware: qcom_scm-64: Make SMC macros less magical Elliot Berman
2020-01-07 21:04 ` [PATCH v5 05/17] firmware: qcom_scm-64: Move svc/cmd/owner into qcom_scm_desc Elliot Berman
2020-01-07 21:04 ` [PATCH v5 06/17] firmware: qcom_scm-64: Add SCM results struct Elliot Berman
2020-01-07 21:04 ` [PATCH v5 07/17] firmware: qcom_scm-64: Move SMC register filling to qcom_scm_call_smccc Elliot Berman
2020-01-07 21:04 ` [PATCH v5 08/17] firmware: qcom_scm-64: Improve SMC convention detection Elliot Berman
2020-01-07 21:04 ` [PATCH v5 09/17] firmware: qcom_scm-32: Use SMC arch wrappers Elliot Berman
2020-01-07 21:04 ` [PATCH v5 10/17] firmware: qcom_scm-32: Add funcnum IDs Elliot Berman
2020-01-07 21:04 ` [PATCH v5 11/17] firmware: qcom_scm-32: Use qcom_scm_desc in non-atomic calls Elliot Berman
2020-01-07 21:04 ` [PATCH v5 12/17] firmware: qcom_scm-32: Move SMCCC register filling to qcom_scm_call Elliot Berman
2020-01-07 21:04 ` [PATCH v5 13/17] firmware: qcom_scm-32: Create common legacy atomic call Elliot Berman
2020-01-07 21:04 ` Elliot Berman [this message]
2020-01-07 21:04 ` [PATCH v5 15/17] firmware: qcom_scm: Order functions, definitions by service/command Elliot Berman
2020-01-07 21:04 ` [PATCH v5 16/17] firmware: qcom_scm: Remove thin wrappers Elliot Berman
2020-01-07 21:04 ` [PATCH v5 17/17] firmware: qcom_scm: Dynamically support SMCCC and legacy conventions Elliot Berman
2020-01-08 7:02 ` Stephen Boyd
2020-01-08 6:42 ` [PATCH v5 00/17] Restructure, improve target support for qcom_scm driver Bjorn Andersson
2020-01-08 6:54 ` Stephen Boyd
2020-01-08 7:21 ` Bjorn Andersson
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