From: Can Guo <cang@codeaurora.org>
To: asutoshd@codeaurora.org, nguyenb@codeaurora.org,
hongwus@codeaurora.org, rnayak@codeaurora.org,
linux-scsi@vger.kernel.org, kernel-team@android.com,
saravanak@google.com, salyzyn@google.com, cang@codeaurora.org
Cc: Alim Akhtar <alim.akhtar@samsung.com>,
Avri Altman <avri.altman@wdc.com>,
"James E.J. Bottomley" <jejb@linux.ibm.com>,
"Martin K. Petersen" <martin.petersen@oracle.com>,
Stanley Chu <stanley.chu@mediatek.com>,
Bean Huo <beanhuo@micron.com>,
Bart Van Assche <bvanassche@acm.org>,
Venkat Gopalakrishnan <venkatg@codeaurora.org>,
Tomas Winkler <tomas.winkler@intel.com>,
linux-kernel@vger.kernel.org (open list)
Subject: [PATCH v5 2/8] scsi: ufs: set load before setting voltage in regulators
Date: Mon, 3 Feb 2020 01:17:44 -0800 [thread overview]
Message-ID: <1580721472-10784-3-git-send-email-cang@codeaurora.org> (raw)
In-Reply-To: <1580721472-10784-1-git-send-email-cang@codeaurora.org>
From: Asutosh Das <asutoshd@codeaurora.org>
This sequence change is required to avoid dips in voltage
during boot-up.
Apparently, this dip is caused because in the original
sequence, the regulators are initialized in lpm mode.
And then when the load is set to high, and more current
is drawn, than is allowed in lpm, the dip is seen.
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Can Guo <cang@codeaurora.org>
Reviewed-by: Hongwu Su <hongwus@codeaurora.org>
---
drivers/scsi/ufs/ufshcd.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
index 10dbc0c..83ae093 100644
--- a/drivers/scsi/ufs/ufshcd.c
+++ b/drivers/scsi/ufs/ufshcd.c
@@ -7248,6 +7248,11 @@ static int ufshcd_config_vreg(struct device *dev,
name = vreg->name;
if (regulator_count_voltages(reg) > 0) {
+ uA_load = on ? vreg->max_uA : 0;
+ ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
+ if (ret)
+ goto out;
+
if (vreg->min_uV && vreg->max_uV) {
min_uV = on ? vreg->min_uV : 0;
ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
@@ -7258,11 +7263,6 @@ static int ufshcd_config_vreg(struct device *dev,
goto out;
}
}
-
- uA_load = on ? vreg->max_uA : 0;
- ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
- if (ret)
- goto out;
}
out:
return ret;
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2020-02-03 9:18 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1580721472-10784-1-git-send-email-cang@codeaurora.org>
2020-02-03 9:17 ` [PATCH v5 1/8] scsi: ufs: Flush exception event before suspend Can Guo
2020-02-03 21:31 ` [EXT] " Bean Huo (beanhuo)
2020-02-03 9:17 ` Can Guo [this message]
2020-02-03 21:41 ` [EXT] [PATCH v5 2/8] scsi: ufs: set load before setting voltage in regulators Bean Huo (beanhuo)
2020-02-04 6:16 ` Stanley Chu
2020-02-03 9:17 ` [PATCH v5 3/8] scsi: ufs: Remove the check before call setup clock notify vops Can Guo
2020-02-03 22:14 ` [EXT] " Bean Huo (beanhuo)
2020-02-04 6:16 ` Stanley Chu
2020-02-03 9:17 ` [PATCH v5 4/8] scsi: ufs-qcom: Adjust bus bandwidth voting and unvoting Can Guo
2020-02-05 2:17 ` Asutosh Das (asd)
2020-02-03 9:17 ` [PATCH v5 5/8] scsi: ufs: Fix ufshcd_hold() caused scheduling while atomic Can Guo
2020-02-03 22:07 ` [EXT] " Bean Huo (beanhuo)
2020-02-04 6:26 ` Stanley Chu
2020-02-03 9:17 ` [PATCH v5 6/8] scsi: ufs: Add dev ref clock gating wait time support Can Guo
2020-02-04 15:26 ` [EXT] " Bean Huo (beanhuo)
2020-02-05 2:50 ` Stanley Chu
2020-02-05 4:52 ` Can Guo
2020-02-06 0:55 ` Stanley Chu
2020-02-06 2:39 ` Can Guo
2020-02-03 9:17 ` [PATCH v5 7/8] scsi: ufs-qcom: Delay specific time before gate ref clk Can Guo
2020-02-05 7:20 ` hongwus
2020-02-03 9:17 ` [PATCH v5 8/8] scsi: ufs: Select INITIAL adapt for HS Gear4 Can Guo
2020-02-04 15:26 ` [EXT] " Bean Huo (beanhuo)
2020-02-05 7:38 ` hongwus
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