From: Sivaprakash Murugesan <sivaprak@codeaurora.org>
To: miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com,
peter.ujfalusi@ti.com, sivaprak@codeaurora.org,
linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH V2 0/2] Fix issues related to register access in IPQ NAND
Date: Tue, 9 Jun 2020 16:40:54 +0530 [thread overview]
Message-ID: <1591701056-3944-1-git-send-email-sivaprak@codeaurora.org> (raw)
Patch 1: avoids register write to unavailable SFLASHC_BURST_CFG register
Patch 2: set BAM mode only if not set by bootloader
[V2]
* As per review comments from Miquèl split the original patch into two
addressing independent issues.
Sivaprakash Murugesan (2):
mtd: rawnand: qcom: remove write to unavailable register
mtd: rawnand: qcom: set BAM mode only if not set already
drivers/mtd/nand/raw/qcom_nandc.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
--
2.7.4
next reply other threads:[~2020-06-09 11:11 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-09 11:10 Sivaprakash Murugesan [this message]
2020-06-09 11:10 ` [PATCH V2 1/2] mtd: rawnand: qcom: remove write to unavailable register Sivaprakash Murugesan
2020-06-09 14:02 ` Miquel Raynal
2020-06-11 4:30 ` Sivaprakash Murugesan
2020-06-09 11:10 ` [PATCH V2 2/2] mtd: rawnand: qcom: set BAM mode only if not set already Sivaprakash Murugesan
2020-06-09 14:03 ` Miquel Raynal
2020-06-11 4:27 ` Sivaprakash Murugesan
2020-06-11 7:13 ` Miquel Raynal
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