From: Klaus Kudielka <klaus.kudielka@gmail.com>
To: Herbert Xu <herbert@gondor.apana.org.au>
Cc: regressions@lists.linux.dev, linux-kernel@vger.kernel.org,
Linux Crypto Mailing List <linux-crypto@vger.kernel.org>,
Boris Brezillon <bbrezillon@kernel.org>,
Arnaud Ebalard <arno@natisbad.org>,
Romain Perier <romain.perier@free-electrons.com>
Subject: Re: [REGRESSION] alg: ahash: Several tests fail during boot on Turris Omnia
Date: Thu, 10 Oct 2024 19:35:33 +0200 [thread overview]
Message-ID: <15fadc356b73a1e8e24183f284b5c0a44a53e679.camel@gmail.com> (raw)
In-Reply-To: <ZwePSPG8aWm6mwKK@gondor.apana.org.au>
On Thu, 2024-10-10 at 16:24 +0800, Herbert Xu wrote:
> On Thu, Oct 10, 2024 at 02:05:56PM +0800, Herbert Xu wrote:
> >
> > Is it really OK to add new entries to the chain after it has been
> > given over to the hardware?
>
> Please give this patch a try to see if it improves the hashing.
>
>
Hmmm, not really (patch applied on top of 6.12-rc2). 5 algorithms failed self-test.
[ 0.385833] alg: ahash: mv-md5 test failed (wrong result) on test vector 3, cfg="init+update+update+final two even splits"
[ 0.390576] alg: ahash: mv-hmac-sha256 test failed (wrong result) on test vector 1, cfg="init+update+final misaligned buffer"
[ 0.396982] alg: self-tests for md5 using mv-md5 failed (rc=-22)
[ 0.408306] alg: self-tests for hmac(sha256) using mv-hmac-sha256 failed (rc=-22)
[ 0.408311] ------------[ cut here ]------------
[ 0.408316] ------------[ cut here ]------------
[ 0.408313] WARNING: CPU: 0 PID: 72 at crypto/testmgr.c:5929 alg_test+0x618/0x640
[ 0.408319] WARNING: CPU: 1 PID: 83 at crypto/testmgr.c:5929 alg_test+0x618/0x640
[ 0.408330] alg: self-tests for md5 using mv-md5 failed (rc=-22)
[ 0.408330] alg: self-tests for hmac(sha256) using mv-hmac-sha256 failed (rc=-22)
[ 0.408334] Modules linked in:
[ 0.408336] Modules linked in:
[ 0.408341] CPU: 1 UID: 0 PID: 83 Comm: cryptomgr_test Not tainted 6.12.0-rc2+ #1
[ 0.408349] Hardware name: Marvell Armada 380/385 (Device Tree)
[ 0.408353] Call trace:
[ 0.408359] unwind_backtrace from show_stack+0x10/0x14
[ 0.408377] show_stack from dump_stack_lvl+0x50/0x64
[ 0.408388] dump_stack_lvl from __warn+0x7c/0xd4
[ 0.408400] __warn from warn_slowpath_fmt+0x110/0x16c
[ 0.408413] warn_slowpath_fmt from alg_test+0x618/0x640
[ 0.408426] alg_test from cryptomgr_test+0x18/0x38
[ 0.408436] cryptomgr_test from kthread+0xdc/0xf8
[ 0.408449] kthread from ret_from_fork+0x14/0x28
[ 0.408458] Exception stack(0xf0fe9fb0 to 0xf0fe9ff8)
[ 0.408464] 9fa0: 00000000 00000000 00000000 00000000
[ 0.408470] 9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 0.408475] 9fe0: 00000000 00000000 00000000 00000000 00000013 00000000
[ 0.408479] ---[ end trace 0000000000000000 ]---
[ 0.408480] CPU: 0 UID: 0 PID: 72 Comm: cryptomgr_test Not tainted 6.12.0-rc2+ #1
[ 0.408489] Tainted: [W]=WARN
[ 0.408492] Hardware name: Marvell Armada 380/385 (Device Tree)
[ 0.408495] Call trace:
[ 0.408498] unwind_backtrace from show_stack+0x10/0x14
[ 0.408513] show_stack from dump_stack_lvl+0x50/0x64
[ 0.408524] dump_stack_lvl from __warn+0x7c/0xd4
[ 0.408534] __warn from warn_slowpath_fmt+0x110/0x16c
[ 0.408547] warn_slowpath_fmt from alg_test+0x618/0x640
[ 0.408559] alg_test from cryptomgr_test+0x18/0x38
[ 0.408569] cryptomgr_test from kthread+0xdc/0xf8
[ 0.408581] kthread from ret_from_fork+0x14/0x28
[ 0.408590] Exception stack(0xf0fc5fb0 to 0xf0fc5ff8)
[ 0.408595] 5fa0: 00000000 00000000 00000000 00000000
[ 0.408602] 5fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 0.408607] 5fe0: 00000000 00000000 00000000 00000000 00000013 00000000
[ 0.408615] ---[ end trace 0000000000000000 ]---
[ 0.408749] alg: ahash: mv-hmac-md5 setkey failed on test vector 0; expected_error=0, actual_error=-80, flags=0x1
[ 0.419090] alg: self-tests for hmac(md5) using mv-hmac-md5 failed (rc=-80)
[ 0.419099] ------------[ cut here ]------------
[ 0.419104] WARNING: CPU: 1 PID: 75 at crypto/testmgr.c:5929 alg_test+0x618/0x640
[ 0.419119] alg: self-tests for hmac(md5) using mv-hmac-md5 failed (rc=-80)
[ 0.419123] Modules linked in:
[ 0.419131] CPU: 1 UID: 0 PID: 75 Comm: cryptomgr_test Tainted: G W 6.12.0-rc2+ #1
[ 0.419140] Tainted: [W]=WARN
[ 0.419143] Hardware name: Marvell Armada 380/385 (Device Tree)
[ 0.419146] Call trace:
[ 0.419151] unwind_backtrace from show_stack+0x10/0x14
[ 0.419168] show_stack from dump_stack_lvl+0x50/0x64
[ 0.419179] dump_stack_lvl from __warn+0x7c/0xd4
[ 0.419191] __warn from warn_slowpath_fmt+0x110/0x16c
[ 0.419204] warn_slowpath_fmt from alg_test+0x618/0x640
[ 0.419217] alg_test from cryptomgr_test+0x18/0x38
[ 0.419227] cryptomgr_test from kthread+0xdc/0xf8
[ 0.419240] kthread from ret_from_fork+0x14/0x28
[ 0.419249] Exception stack(0xf0fcdfb0 to 0xf0fcdff8)
[ 0.419255] dfa0: 00000000 00000000 00000000 00000000
[ 0.419261] dfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 0.419266] dfe0: 00000000 00000000 00000000 00000000 00000013 00000000
[ 0.419270] ---[ end trace 0000000000000000 ]---
[ 0.419541] alg: ahash: mv-sha1 test failed (wrong result) on test vector 1, cfg="init+update+final aligned buffer"
[ 0.430056] alg: self-tests for sha1 using mv-sha1 failed (rc=-22)
[ 0.430063] ------------[ cut here ]------------
[ 0.430068] WARNING: CPU: 0 PID: 82 at crypto/testmgr.c:5929 alg_test+0x618/0x640
[ 0.430082] alg: self-tests for sha1 using mv-sha1 failed (rc=-22)
[ 0.430086] Modules linked in:
[ 0.430094] CPU: 0 UID: 0 PID: 82 Comm: cryptomgr_test Tainted: G W 6.12.0-rc2+ #1
[ 0.430103] Tainted: [W]=WARN
[ 0.430106] Hardware name: Marvell Armada 380/385 (Device Tree)
[ 0.430110] Call trace:
[ 0.430114] unwind_backtrace from show_stack+0x10/0x14
[ 0.430132] show_stack from dump_stack_lvl+0x50/0x64
[ 0.430144] dump_stack_lvl from __warn+0x7c/0xd4
[ 0.430155] __warn from warn_slowpath_fmt+0x110/0x16c
[ 0.430169] warn_slowpath_fmt from alg_test+0x618/0x640
[ 0.430182] alg_test from cryptomgr_test+0x18/0x38
[ 0.430192] cryptomgr_test from kthread+0xdc/0xf8
[ 0.430205] kthread from ret_from_fork+0x14/0x28
[ 0.430214] Exception stack(0xf0fe5fb0 to 0xf0fe5ff8)
[ 0.430220] 5fa0: 00000000 00000000 00000000 00000000
[ 0.430226] 5fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 0.430231] 5fe0: 00000000 00000000 00000000 00000000 00000013 00000000
[ 0.430235] ---[ end trace 0000000000000000 ]---
[ 0.430326] alg: ahash: mv-hmac-sha1 setkey failed on test vector 0; expected_error=0, actual_error=-80, flags=0x1
[ 0.440728] alg: self-tests for hmac(sha1) using mv-hmac-sha1 failed (rc=-80)
[ 0.440733] ------------[ cut here ]------------
[ 0.440736] WARNING: CPU: 0 PID: 73 at crypto/testmgr.c:5929 alg_test+0x618/0x640
[ 0.440747] alg: self-tests for hmac(sha1) using mv-hmac-sha1 failed (rc=-80)
[ 0.440750] Modules linked in:
[ 0.440757] CPU: 0 UID: 0 PID: 73 Comm: cryptomgr_test Tainted: G W 6.12.0-rc2+ #1
[ 0.440764] Tainted: [W]=WARN
[ 0.440767] Hardware name: Marvell Armada 380/385 (Device Tree)
[ 0.440771] Call trace:
[ 0.440773] unwind_backtrace from show_stack+0x10/0x14
[ 0.440788] show_stack from dump_stack_lvl+0x50/0x64
[ 0.440798] dump_stack_lvl from __warn+0x7c/0xd4
[ 0.440808] __warn from warn_slowpath_fmt+0x110/0x16c
[ 0.440821] warn_slowpath_fmt from alg_test+0x618/0x640
[ 0.440834] alg_test from cryptomgr_test+0x18/0x38
[ 0.440844] cryptomgr_test from kthread+0xdc/0xf8
[ 0.440855] kthread from ret_from_fork+0x14/0x28
[ 0.440864] Exception stack(0xf0fc9fb0 to 0xf0fc9ff8)
[ 0.440869] 9fa0: 00000000 00000000 00000000 00000000
[ 0.440875] 9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 0.440880] 9fe0: 00000000 00000000 00000000 00000000 00000013 00000000
[ 0.440884] ---[ end trace 0000000000000000 ]---
next prev parent reply other threads:[~2024-10-10 17:35 UTC|newest]
Thread overview: 79+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-05 11:21 [REGRESSION] alg: ahash: Several tests fail during boot on Turris Omnia Klaus Kudielka
2024-10-06 8:47 ` Klaus Kudielka
2024-10-06 9:11 ` Herbert Xu
2024-10-06 9:23 ` Klaus Kudielka
2024-10-07 8:27 ` Herbert Xu
2024-10-07 20:57 ` Klaus Kudielka
2024-10-09 8:34 ` Herbert Xu
2024-10-09 8:38 ` [PATCH] crypto: marvell/cesa - Disable hash algorithms Herbert Xu
2024-10-09 16:48 ` [REGRESSION] alg: ahash: Several tests fail during boot on Turris Omnia Klaus Kudielka
2024-10-10 6:05 ` Herbert Xu
2024-10-10 8:24 ` Herbert Xu
2024-10-10 17:35 ` Klaus Kudielka [this message]
2024-10-15 4:52 ` Herbert Xu
2024-10-15 17:38 ` Klaus Kudielka
2024-10-16 4:27 ` Herbert Xu
2024-10-16 5:51 ` Klaus Kudielka
2024-10-16 9:53 ` Herbert Xu
2024-11-12 19:33 ` Klaus Kudielka
2024-11-13 9:57 ` Thorsten Leemhuis
2025-05-06 13:19 ` Herbert Xu
2025-05-07 8:43 ` [PATCH] crypto: marvell/cesa - Do not chain submitted requests Herbert Xu
2025-05-07 15:16 ` Corentin Labbe
2025-05-08 5:15 ` [v2 PATCH] " Herbert Xu
2025-05-08 5:22 ` [v3 " Herbert Xu
2025-05-08 12:53 ` Corentin Labbe
2025-05-08 13:10 ` Herbert Xu
2025-05-08 13:43 ` Corentin Labbe
2025-05-09 3:13 ` Herbert Xu
2025-05-09 3:19 ` Herbert Xu
2025-05-09 8:11 ` Herbert Xu
2025-05-09 11:01 ` Corentin Labbe
2025-05-10 1:15 ` Herbert Xu
2025-05-10 1:37 ` Herbert Xu
2025-05-10 1:44 ` Herbert Xu
2025-05-10 10:41 ` [PATCH] crypto: marvell/cesa - Handle zero-length skcipher requests Herbert Xu
2025-05-10 8:32 ` [v3 PATCH] crypto: marvell/cesa - Do not chain submitted requests Klaus Kudielka
2025-05-10 9:05 ` Herbert Xu
2025-05-10 9:38 ` Klaus Kudielka
2025-05-10 10:19 ` Herbert Xu
2025-05-10 10:43 ` [PATCH] crypto: marvell/cesa - Avoid empty transfer descriptor Herbert Xu
2025-05-10 11:14 ` Corentin Labbe
2025-05-10 11:39 ` Herbert Xu
2025-05-10 13:02 ` Herbert Xu
2025-05-10 15:07 ` Klaus Kudielka
2025-05-11 3:22 ` Herbert Xu
2025-05-11 16:39 ` Klaus Kudielka
2025-05-13 9:20 ` Herbert Xu
2025-05-14 5:12 ` Klaus Kudielka
2025-05-14 5:14 ` Herbert Xu
2025-05-15 17:53 ` Klaus Kudielka
2025-05-15 18:21 ` Eric Biggers
2025-05-15 18:45 ` Klaus Kudielka
2025-05-15 23:25 ` Herbert Xu
2025-05-16 12:41 ` Corentin Labbe
2025-05-16 12:45 ` Herbert Xu
2025-05-17 11:24 ` Corentin Labbe
2025-05-18 7:58 ` Herbert Xu
2025-05-21 5:06 ` Herbert Xu
2025-05-21 9:16 ` Herbert Xu
2025-05-21 9:58 ` Arnd Bergmann
2025-05-21 10:24 ` Herbert Xu
2025-05-21 11:36 ` Arnd Bergmann
2025-05-22 3:13 ` Herbert Xu
2025-05-22 20:08 ` Corentin Labbe
2025-05-21 10:45 ` Corentin Labbe
2025-05-21 10:56 ` Herbert Xu
2025-05-21 13:58 ` Corentin Labbe
2025-05-22 3:01 ` crypto: marvell/cesa - dma_alloc_coherent broken but kmalloc + dma_map_single works Herbert Xu
2025-05-22 7:38 ` Herbert Xu
2025-05-22 20:07 ` Corentin Labbe
2025-05-23 11:46 ` Herbert Xu
2025-05-28 9:58 ` Herbert Xu
2025-05-29 11:17 ` Corentin Labbe
2025-05-22 11:13 ` Herbert Xu
2025-05-16 4:12 ` [PATCH] crypto: marvell/cesa - Avoid empty transfer descriptor Herbert Xu
2025-05-16 17:36 ` Klaus Kudielka
2025-06-17 5:32 ` Klaus Kudielka
2025-06-17 5:36 ` Herbert Xu
2025-05-08 12:49 ` [v2 PATCH] crypto: marvell/cesa - Do not chain submitted requests Corentin Labbe
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