Re: [PATCH 1/7] clk: qcom: clk-alpha-pll: Add support for Stromer PLLs

Stephen Boyd
2020-10-14T02:36:05Z

Can you check your get_maintainers script invocation? Not sure why arm64
maintainers are Cced on a clk patch.

Quoting Varadarajan Narayanan (2020-09-27 22:15:34)
> Add programming sequence support for managing the Stromer
> PLLs.
>
> Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
> ---
> drivers/clk/qcom/clk-alpha-pll.c | 156 ++++++++++++++++++++++++++++++++++++++-
> drivers/clk/qcom/clk-alpha-pll.h | 5 ++
> 2 files changed, 160 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
> index 26139ef..ce3257f 100644
> --- a/drivers/clk/qcom/clk-alpha-pll.c
> +++ b/drivers/clk/qcom/clk-alpha-pll.c
> @@ -116,6 +116,19 @@ const u8 clk_alpha_pll_regs[][PLL_OFF_MAX_REGS] = {
> [PLL_OFF_OPMODE] = 0x38,
> [PLL_OFF_ALPHA_VAL] = 0x40,
> },
> +

Nitpick: Drop this newline.

> + [CLK_ALPHA_PLL_TYPE_STROMER] = {
> + [PLL_OFF_L_VAL] = 0x08,
> + [PLL_OFF_ALPHA_VAL] = 0x10,
> + [PLL_OFF_ALPHA_VAL_U] = 0x14,
> + [PLL_OFF_USER_CTL] = 0x18,
> + [PLL_OFF_USER_CTL_U] = 0x1c,
> + [PLL_OFF_CONFIG_CTL] = 0x20,
> + [PLL_OFF_CONFIG_CTL_U] = 0xff,
> + [PLL_OFF_TEST_CTL] = 0x30,
> + [PLL_OFF_TEST_CTL_U] = 0x34,
> + [PLL_OFF_STATUS] = 0x28,
> + },
> };
> EXPORT_SYMBOL_GPL(clk_alpha_pll_regs);
>
> @@ -127,6 +140,8 @@ EXPORT_SYMBOL_GPL(clk_alpha_pll_regs);
> #define ALPHA_BITWIDTH 32U
> #define ALPHA_SHIFT(w) min(w, ALPHA_BITWIDTH)
>
> +#define PLL_STATUS_REG_SHIFT 8

This should have an ALPHA_ prefix.

> +
> #define PLL_HUAYRA_M_WIDTH 8
> #define PLL_HUAYRA_M_SHIFT 8
> #define PLL_HUAYRA_M_MASK 0xff
> @@ -240,14 +255,143 @@ void clk_alpha_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
> mask |= config->pre_div_mask;
> mask |= config->post_div_mask;
> mask |= config->vco_mask;
> + mask |= config->alpha_en_mask;
> + mask |= config->alpha_mode_mask;
>
> regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val);
>
> + /* Stromer APSS PLL does not enable LOCK_DET by default, so enable it */
> + val_u = config->status_reg_val << PLL_STATUS_REG_SHIFT;
> + val_u |= config->lock_det;
> +
> + mask_u = config->status_reg_mask;
> + mask_u |= config->lock_det;
> +
> + if (val_u != 0)

if (val_u) is more canonical.

> + regmap_update_bits(regmap, PLL_USER_CTL_U(pll), mask_u, val_u);
> +
> + if (config->test_ctl_val != 0)

Same comment

> + regmap_write(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);
> +
> + if (config->test_ctl_hi_val != 0)

Same comment

> + regmap_write(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);
> +
> if (pll->flags & SUPPORTS_FSM_MODE)
> qcom_pll_set_fsm_mode(regmap, PLL_MODE(pll), 6, 0);
> }
> EXPORT_SYMBOL_GPL(clk_alpha_pll_configure);
>
> +static unsigned long
> +alpha_pll_stromer_calc_rate(u64 prate, u32 l, u64 a)
> +{
> + return (prate * l) + ((prate * a) >> ALPHA_REG_BITWIDTH);

Is this not already in this file? Why can't we use
alpha_pll_calc_rate()?

> +}
> +
> +static unsigned long
> +alpha_pll_stromer_round_rate(unsigned long rate, unsigned long prate, u32 *l, u64 *a)
> +{
> + u64 remainder;
> + u64 quotient;
> +
> + quotient = rate;
> + remainder = do_div(quotient, prate);
> + *l = quotient;
> +
> + if (!remainder) {
> + *a = 0;
> + return rate;
> + }
> +
> + quotient = remainder << ALPHA_REG_BITWIDTH;
> +
> + remainder = do_div(quotient, prate);
> +
> + if (remainder)
> + quotient++;
> +
> + *a = quotient;
> + return alpha_pll_stromer_calc_rate(prate, *l, *a);
> +}
> +
> +static unsigned long
> +clk_alpha_pll_stromer_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
> +{
> + u32 l, low, high, ctl;
> + u64 a = 0, prate = parent_rate;
> + struct clk_alpha_pll *pll = to_clk_alpha_pll(hw);
> +
> + regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);
> +
> + regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);
> + if (ctl & PLL_ALPHA_EN) {
> + regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &low);
> + regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll),
> + &high);
> + a = (u64)high << ALPHA_BITWIDTH | low;
> + }
> +
> + return alpha_pll_stromer_calc_rate(prate, l, a);
> +}
> +
> +static int clk_alpha_pll_stromer_determine_rate(struct clk_hw *hw,
> + struct clk_rate_request *req)
> +{
> + unsigned long rate = req->rate;
> + u32 l;
> + u64 a;
> +
> + rate = alpha_pll_stromer_round_rate(rate, req->best_parent_rate, &l, &a);

Why assign to rate if nobody is going to look at it? Should probably be
set to req->rate instead?

> +
> + return 0;
> +}
> +
> +static int clk_alpha_pll_stromer_set_rate(struct clk_hw *hw, unsigned long rate,
> + unsigned long prate)
> +{
> + struct clk_alpha_pll *pll = to_clk_alpha_pll(hw);
> + u32 l;
> + int ret;
> + u64 a;
> +
> + rate = alpha_pll_stromer_round_rate(rate, prate, &l, &a);
> +
> + /* Write desired values to registers */

Please drop this useless comment.

> + regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);
> + regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);
> + regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll),
> + a >> ALPHA_BITWIDTH);
> +
> + regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),
> + PLL_ALPHA_EN, PLL_ALPHA_EN);
> +
> + if (!clk_hw_is_enabled(hw))
> + return 0;
> +
> + /* Stromer PLL supports Dynamic programming.

The /* goes on a line by itself.

> + * It allows the PLL frequency to be changed on-the-fly without first
> + * execution of a shutdown procedure followed by a bring up procedure.
> + */

Cool feature. Maybe that can go into the header file though?

> +
> + regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_UPDATE,
> + PLL_UPDATE);
> + /* Make sure PLL_UPDATE request goes through */
> + mb();

regmap APIs already have memory barriers so this isn't needed?

> +
> + /* Wait for PLL_UPDATE to be cleared */

I think the code already says this so we can just drop this comment.

> + ret = wait_for_pll_update(pll);
> + if (ret)
> + return ret;
> +
> + /* Wait 11or more PLL clk_ref ticks[to be explored more on wait] */
> +

Is this a TODO?

> + /* Poll LOCK_DET for one */

I think the code already says this so we can just drop this comment.

> + ret = wait_for_pll_enable_lock(pll);
> + if (ret)
> + return ret;
> +
> + return 0;
> +}
> +
> static int clk_alpha_pll_hwfsm_enable(struct clk_hw *hw)
> {
> int ret;