From: Weiyi Lu <weiyi.lu@mediatek.com>
To: Matthias Brugger <matthias.bgg@gmail.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
Matthias Brugger <matthias.bgg@gmail.com>
Cc: Enric Balletbo i Serra <enric.balletbo@collabora.com>,
<linux-kernel@vger.kernel.org>, <drinkcat@chromium.org>,
<hsinyi@chromium.org>, Collabora Kernel ML <kernel@collabora.com>,
<fparent@baylibre.com>, <linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
Enric Balletbo i Serra <enric.balletbo@collabora.com>,
<linux-kernel@vger.kernel.org>, <drinkcat@chromium.org>,
<hsinyi@chromium.org>, Collabora Kernel ML <kernel@collabora.com>,
<fparent@baylibre.com>, <linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
Enric Balletbo i Serra <enric.balletbo@collabora.com>,
<linux-kernel@vger.kernel.org>, <drinkcat@chromium.org>,
<hsinyi@chromium.org>, Collabora Kernel ML <kernel@collabora.com>,
<fparent@baylibre.com>, <linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
Enric Balletbo i Serra <enric.balletbo@collabora.com>,
<linux-kernel@vger.kernel.org>, <drinkcat@chromium.org>,
<hsinyi@chromium.org>, Collabora Kernel ML <kernel@collabora.com>,
<fparent@baylibre.com>, <linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
Enric Balletbo i Serra <enric.balletbo@collabora.com>,
<linux-kernel@vger.kernel.org>, <drinkcat@chromium.org>,
<hsinyi@chromium.org>, Collabora Kernel ML <kernel@collabora.com>,
<fparent@baylibre.com>, <linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
Enric Balletbo i Serra <enric.balletbo@collabora.com>,
<linux-kernel@vger.kernel.org>, <drinkcat@chromium.org>,
<hsinyi@chromium.org>, Collabora Kernel ML <kernel@collabora.com>,
<fparent@baylibre.com>, <linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>
Subject: Re: [PATCH v3 15/16] soc: mediatek: pm-domains: Add default power off flag
Date: Tue, 27 Oct 2020 19:18:37 +0800 [thread overview]
Message-ID: <1603797517.25228.3.camel@mtksdaap41> (raw)
In-Reply-To: <05be2a94-d6e6-36e5-2c14-6d971e4a7677@gmail.com>
On Tue, 2020-10-27 at 11:53 +0100, Matthias Brugger wrote:
>
> On 26/10/2020 18:55, Enric Balletbo i Serra wrote:
> > From: Weiyi Lu <weiyi.lu@mediatek.com>
> >
> > For some power domain, like conn on MT8192, it should be default OFF.
> > Because the power on/off control relies the function of connectivity chip
> > and its firmware. And if project choose other chip vendor solution,
> > those necessary connectivity functions will not provided.
> >
> > Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
> > Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
> > ---
> >
> > Changes in v3: None
> > Changes in v2: None
> >
> > drivers/soc/mediatek/mtk-pm-domains.c | 23 +++++++++++++++++------
> > drivers/soc/mediatek/mtk-pm-domains.h | 1 +
> > 2 files changed, 18 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c
> > index 63993076a544..fe0e955076a0 100644
> > --- a/drivers/soc/mediatek/mtk-pm-domains.c
> > +++ b/drivers/soc/mediatek/mtk-pm-domains.c
> > @@ -378,10 +378,16 @@ generic_pm_domain *scpsys_add_one_domain(struct scpsys *scpsys, struct device_no
> > * software. The unused domains will be switched off during
> > * late_init time.
> > */
> > - ret = scpsys_power_on(&pd->genpd);
> > - if (ret < 0) {
> > - dev_err(scpsys->dev, "%pOF: failed to power on domain: %d\n", node, ret);
> > - goto err_unprepare_clocks;
> > + if (MTK_SCPD_CAPS(pd, MTK_SCPD_KEEP_DEFAULT_OFF)) {
> > + if (scpsys_domain_is_on(pd))
> > + dev_warn(scpsys->dev,
> > + "%pOF: A default off power domain has been ON\n", node);
> > + } else {
> > + ret = scpsys_power_on(&pd->genpd);
> > + if (ret < 0) {
> > + dev_err(scpsys->dev, "%pOF: failed to power on domain: %d\n", node, ret);
> > + goto err_unprepare_clocks;
> > + }
> > }
> >
> > if (scpsys->domains[id]) {
> > @@ -395,7 +401,11 @@ generic_pm_domain *scpsys_add_one_domain(struct scpsys *scpsys, struct device_no
> > pd->genpd.power_off = scpsys_power_off;
> > pd->genpd.power_on = scpsys_power_on;
> >
> > - pm_genpd_init(&pd->genpd, NULL, false);
> > + if (MTK_SCPD_CAPS(pd, MTK_SCPD_KEEP_DEFAULT_OFF))
> > + pm_genpd_init(&pd->genpd, NULL, true);
> > + else
> > + pm_genpd_init(&pd->genpd, NULL, false);
> > +
> > scpsys->domains[id] = &pd->genpd;
> >
> > return scpsys->pd_data.domains[id];
> > @@ -478,7 +488,8 @@ static void scpsys_remove_one_domain(struct scpsys_domain *pd)
> > "failed to remove domain '%s' : %d - state may be inconsistent\n",
> > pd->genpd.name, ret);
> >
> > - scpsys_power_off(&pd->genpd);
> > + if (!MTK_SCPD_CAPS(pd, MTK_SCPD_KEEP_DEFAULT_OFF))
> > + scpsys_power_off(&pd->genpd);
>
> OK, so you merged Weiyi's patches in this series :)
>
> So same comment here: Does it really hurt if we turn-off a already turned-off
> power domain? Or can we get rid of this check?
>
We do need this check here. If you try to turn-off this power domain,
you might make the clock or regulator reference count unbalanced.
> Regards,
> Matthias
>
> >
> > clk_bulk_unprepare(pd->num_clks, pd->clks);
> > clk_bulk_put(pd->num_clks, pd->clks);
> > diff --git a/drivers/soc/mediatek/mtk-pm-domains.h b/drivers/soc/mediatek/mtk-pm-domains.h
> > index 2ad213be84a5..0fa6a938b40c 100644
> > --- a/drivers/soc/mediatek/mtk-pm-domains.h
> > +++ b/drivers/soc/mediatek/mtk-pm-domains.h
> > @@ -6,6 +6,7 @@
> > #define MTK_SCPD_ACTIVE_WAKEUP BIT(0)
> > #define MTK_SCPD_FWAIT_SRAM BIT(1)
> > #define MTK_SCPD_SRAM_ISO BIT(2)
> > +#define MTK_SCPD_KEEP_DEFAULT_OFF BIT(3)
> > #define MTK_SCPD_CAPS(_scpd, _x) ((_scpd)->data->caps & (_x))
> >
> > #define SPM_VDE_PWR_CON 0x0210
> >
next prev parent reply other threads:[~2020-10-27 11:18 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-26 17:55 [PATCH v3 00/16] soc: mediatek: pm-domains: Add new driver for SCPSYS power domains controller Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 01/16] dt-bindings: power: Add bindings for the Mediatek " Enric Balletbo i Serra
2020-10-28 13:55 ` Rob Herring
2020-10-28 13:57 ` Rob Herring
2020-10-26 17:55 ` [PATCH v3 02/16] soc: mediatek: Add MediaTek SCPSYS power domains Enric Balletbo i Serra
2020-10-27 0:55 ` Nicolas Boichat
2020-10-30 10:54 ` Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 03/16] arm64: dts: mediatek: Add mt8173 power domain controller Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 04/16] soc: mediatek: pm-domains: Add bus protection protocol Enric Balletbo i Serra
2020-10-27 0:58 ` Nicolas Boichat
2020-10-27 11:07 ` Weiyi Lu
2020-10-30 10:55 ` Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 05/16] soc: mediatek: pm_domains: Make bus protection generic Enric Balletbo i Serra
2020-10-27 2:41 ` Nicolas Boichat
2020-10-27 12:57 ` Fabien Parent
2020-10-29 14:49 ` Matthias Brugger
2020-10-26 17:55 ` [PATCH v3 06/16] soc: mediatek: pm-domains: Add SMI block as bus protection block Enric Balletbo i Serra
2020-10-27 2:44 ` Nicolas Boichat
2020-10-30 10:56 ` Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 07/16] soc: mediatek: pm-domains: Add extra sram control Enric Balletbo i Serra
2020-10-27 2:47 ` Nicolas Boichat
2020-10-26 17:55 ` [PATCH v3 08/16] soc: mediatek: pm-domains: Add subsystem clocks Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 09/16] soc: mediatek: pm-domains: Allow bus protection to ignore clear ack Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 10/16] dt-bindings: power: Add MT8183 power domains Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 11/16] soc: mediatek: pm-domains: Add support for mt8183 Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 12/16] arm64: dts: mediatek: Add smi_common node for MT8183 Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 13/16] arm64: dts: mediatek: Add mt8183 power domains controller Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 14/16] dt-bindings: power: Add MT8192 power domains Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 15/16] soc: mediatek: pm-domains: Add default power off flag Enric Balletbo i Serra
2020-10-27 10:53 ` Matthias Brugger
2020-10-27 11:18 ` Weiyi Lu [this message]
2020-10-29 14:51 ` Matthias Brugger
2020-10-30 11:17 ` Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 16/16] soc: mediatek: pm-domains: Add support for mt8192 Enric Balletbo i Serra
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