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From: Heiko =?ISO-8859-1?Q?St=FCbner?= <heiko.stuebner@bq.com>
To: =?ISO-8859-1?Q?S=F6ren?= Brinkmann <soren.brinkmann@xilinx.com>
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Subject: Re: [PATCH v5 2/6] dt-bindings: add mtk-timer bindings
Date: Wed, 21 May 2014 19:18:59 +0200
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Am Mittwoch, 21. Mai 2014, 09:53:57 schrieb Sören Brinkmann:
> On Wed, 2014-05-21 at 06:54PM +0200, Heiko Stübner wrote:
> > Am Mittwoch, 21. Mai 2014, 09:34:10 schrieb Sören Brinkmann:
> > > Hi Matthias,
> > > 
> > > On Wed, 2014-05-21 at 06:26PM +0200, Matthias Brugger wrote:
> > > > +		compatible = "mediatek,mtk6577-timer";
> > > > +		reg = <0x10008000 0x80>;
> > > > +		interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>;
> > > > +		clocks = <&system_clk>, <&rtc_clk>;
> > > > +		clock-names = "system-clk", "rtc-clk";
> > > 
> > > I'm still not convinced that the timer IP calls its clock inputs this
> > > way, but well.
> > 
> > Maybe this might convince you ;-)
> > 
> > "The GPT includes 5 32-bit timers and one 64-bit timer. Each timer has 4
> > operation modes, which are ONE-SHOT,  REPEAT,  KEEP-GO and  FREERUN, and
> > can operate on one of the 2 clock sources, RTC clock (32.768kHz) and
> > system clock (13MHz)."
> 
> Is this copied from the timer data sheet or the SOC documentation?

That is from the processor datasheet containing the timer documentation.
I don't think it's customary for soc vendors to provide additional individual 
documentation for self-developed IPs contained in a SoC.