From: Rob Herring <robh@kernel.org>
To: Xingyu Wu <xingyu.wu@starfivetech.com>
Cc: linux-clk@vger.kernel.org, linux-riscv@lists.infradead.org,
Palmer Dabbelt <palmer@dabbelt.com>,
William Qiu <william.qiu@starfivetech.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Hal Feng <hal.feng@starfivetech.com>,
Stephen Boyd <sboyd@kernel.org>,
Albert Ou <aou@eecs.berkeley.edu>,
Conor Dooley <conor@kernel.org>,
Emil Renner Berthing <emil.renner.berthing@canonical.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Michael Turquette <mturquette@baylibre.com>,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v6 2/7] dt-bindings: soc: starfive: Add StarFive syscon module
Date: Mon, 03 Jul 2023 21:52:16 -0600 [thread overview]
Message-ID: <168844273679.800666.7152631195397313900.robh@kernel.org> (raw)
In-Reply-To: <20230704020239.288500-3-xingyu.wu@starfivetech.com>
On Tue, 04 Jul 2023 10:02:34 +0800, Xingyu Wu wrote:
> From: William Qiu <william.qiu@starfivetech.com>
>
> Add documentation to describe StarFive System Controller Registers.
>
> Co-developed-by: Xingyu Wu <xingyu.wu@starfivetech.com>
> Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
> Signed-off-by: William Qiu <william.qiu@starfivetech.com>
> ---
> .../soc/starfive/starfive,jh7110-syscon.yaml | 93 +++++++++++++++++++
> MAINTAINERS | 7 ++
> 2 files changed, 100 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.example.dtb: syscon@13030000: reg: [[0, 318963712], [0, 4096]] is too long
from schema $id: http://devicetree.org/schemas/mfd/syscon.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.example.dtb: syscon@13030000: reg: [[0, 318963712], [0, 4096]] is too long
from schema $id: http://devicetree.org/schemas/soc/starfive/starfive,jh7110-syscon.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.example.dtb: syscon@17010000: reg: [[0, 385941504], [0, 4096]] is too long
from schema $id: http://devicetree.org/schemas/mfd/syscon.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.example.dtb: syscon@17010000: reg: [[0, 385941504], [0, 4096]] is too long
from schema $id: http://devicetree.org/schemas/soc/starfive/starfive,jh7110-syscon.yaml#
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20230704020239.288500-3-xingyu.wu@starfivetech.com
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
next prev parent reply other threads:[~2023-07-04 3:52 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-04 2:02 [PATCH v6 0/7] Add PLL clocks driver and syscon for StarFive JH7110 SoC Xingyu Wu
2023-07-04 2:02 ` [PATCH v6 1/7] dt-bindings: clock: Add StarFive JH7110 PLL clock generator Xingyu Wu
2023-07-04 2:02 ` [PATCH v6 2/7] dt-bindings: soc: starfive: Add StarFive syscon module Xingyu Wu
2023-07-04 3:52 ` Rob Herring [this message]
2023-07-04 6:30 ` Krzysztof Kozlowski
2023-07-04 7:04 ` Xingyu Wu
2023-07-04 2:02 ` [PATCH v6 3/7] dt-bindings: clock: jh7110-syscrg: Add PLL clock inputs Xingyu Wu
2023-07-04 2:02 ` [PATCH v6 4/7] clk: starfive: Add StarFive JH7110 PLL clock driver Xingyu Wu
2023-07-04 2:02 ` [PATCH v6 5/7] clk: starfive: jh7110-sys: Add PLL clocks source from DTS Xingyu Wu
2023-07-04 2:02 ` [PATCH v6 6/7] riscv: dts: starfive: jh7110: Add syscon nodes Xingyu Wu
2023-07-04 2:02 ` [PATCH v6 7/7] riscv: dts: starfive: jh7110: Add PLL clocks source in SYSCRG node Xingyu Wu
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