Re: [net-next PATCH v4] octeontx2-pf: Use PTP HW timestamp counter atomic update feature

Simon Horman
2023-08-22T07:29:21Z

On Mon, Aug 21, 2023 at 04:06:29PM +0530, Sai Krishna wrote:
> Some of the newer silicon versions in CN10K series supports a feature
> where in the current PTP timestamp in HW can be updated atomically
> without losing any cpu cycles unlike read/modify/write register.
> This patch uses this feature so that PTP accuracy can be improved
> while adjusting the master offset in HW. There is no need for SW
> timecounter when using this feature. So removed references to SW
> timecounter wherever appropriate.
>
> Signed-off-by: Sai Krishna <saikrishnag@marvell.com>
> Signed-off-by: Naveen Mamindlapalli <naveenm@marvell.com>
> Signed-off-by: Sunil Kovvuri Goutham <sgoutham@marvell.com>
> Reviewed-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
> ---
> v4:
> - Addressed review comments given by Leon Romanovsky
> 1. Unlocked mutex in error conditions.
> v3:
> - Addressed review comments given by Jakub Kicinski
> 1. Fixed re-ordering of headers in alphabetical order
> 2. Refactored SoC revision identification logic
> 3. CN10K errata revisions can be different from atomic update
> supported revision devices.
> 4. Removed ptp device check.
> v2:
> - Addressed review comments given by Simon Horman, Kalesh Anakkur Purayil
> 1. Removed inline keyword for function in .c file
> 2. Modified/optimized conditions related boolean

Reviewed-by: Simon Horman <horms@kernel.org>