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Subject: Re: [PATCH v1] dt-bindings: riscv: permit numbers in "riscv,isa"
From: patchwork-bot+linux-riscv@kernel.org
Message-Id: 
 <170498463788.20080.14469126182221973580.git-patchwork-notify@kernel.org>
Date: Thu, 11 Jan 2024 14:50:37 +0000
References: <20231208-uncolored-oxidant-5ab37dd3ab84@spud>
In-Reply-To: <20231208-uncolored-oxidant-5ab37dd3ab84@spud>
To: Conor Dooley <conor@kernel.org>
Cc: linux-riscv@lists.infradead.org, palmer@dabbelt.com,
 conor.dooley@microchip.com, robh+dt@kernel.org,
 krzysztof.kozlowski+dt@linaro.org, paul.walmsley@sifive.com,
 aou@eecs.berkeley.edu, devicetree@vger.kernel.org,
 linux-kernel@vger.kernel.org

Hello:

This patch was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <palmer@rivosinc.com>:

On Fri,  8 Dec 2023 16:06:51 +0000 you wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
> 
> There are some extensions that contain numbers, such as Zve32f, which
> are enabled by the "max" cpu type in QEMU.
> 
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> 
> [...]

Here is the summary with links:
  - [v1] dt-bindings: riscv: permit numbers in "riscv,isa"
    https://git.kernel.org/riscv/c/baa04909d100

You are awesome, thank you!
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