From: Vinod Koul <vkoul@kernel.org>
To: Kishon Vijay Abraham I <kishon@kernel.org>,
Abel Vesa <abel.vesa@linaro.org>
Cc: Johan Hovold <johan+linaro@kernel.org>,
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
linux-kernel@vger.kernel.org, Qiang Yu <quic_qianyu@quicinc.com>
Subject: Re: [PATCH v2] phy: qcom: qmp-pcie: Configure all tables on port B PHY
Date: Fri, 30 Aug 2024 00:35:31 +0530 [thread overview]
Message-ID: <172495833122.405683.1905233025604889518.b4-ty@kernel.org> (raw)
In-Reply-To: <20240801-phy-qcom-qmp-pcie-write-all-tbls-second-port-v2-1-6e53c701e87e@linaro.org>
On Thu, 01 Aug 2024 18:54:53 +0300, Abel Vesa wrote:
> Currently, only the RX and TX tables are written to the second PHY
> (port B) when the 4-lanes mode is configured, but according to Qualcomm
> internal documentation, the pcs, pcs_misc, serdes and ln_shrd tables need
> to be written as well.
>
>
Applied, thanks!
[1/1] phy: qcom: qmp-pcie: Configure all tables on port B PHY
commit: 00c5f32283f377ec60870bccbd518d9feb7fbc52
Best regards,
--
~Vinod
prev parent reply other threads:[~2024-08-29 19:05 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-01 15:54 [PATCH v2] phy: qcom: qmp-pcie: Configure all tables on port B PHY Abel Vesa
2024-08-01 19:27 ` Dmitry Baryshkov
2024-08-04 16:36 ` Vinod Koul
2024-08-29 19:05 ` Vinod Koul [this message]
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