* [PATCH] irqchip/riscv-imsic: Fix output text of base address
@ 2024-09-09 8:56 Andrew Jones
2024-09-09 10:55 ` Anup Patel
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Andrew Jones @ 2024-09-09 8:56 UTC (permalink / raw)
To: linux-riscv, linux-kernel; +Cc: anup, tglx, paul.walmsley, palmer, aou
The "per-CPU IDs ... at base ..." info log is outputting a physical
address, not a PPN.
Fixes: 027e125acdba ("irqchip/riscv-imsic: Add device MSI domain support for platform devices")
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
---
drivers/irqchip/irq-riscv-imsic-platform.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-riscv-imsic-platform.c b/drivers/irqchip/irq-riscv-imsic-platform.c
index 11723a763c10..c5ec66e0bfd3 100644
--- a/drivers/irqchip/irq-riscv-imsic-platform.c
+++ b/drivers/irqchip/irq-riscv-imsic-platform.c
@@ -340,7 +340,7 @@ int imsic_irqdomain_init(void)
imsic->fwnode, global->hart_index_bits, global->guest_index_bits);
pr_info("%pfwP: group-index-bits: %d, group-index-shift: %d\n",
imsic->fwnode, global->group_index_bits, global->group_index_shift);
- pr_info("%pfwP: per-CPU IDs %d at base PPN %pa\n",
+ pr_info("%pfwP: per-CPU IDs %d at base address %pa\n",
imsic->fwnode, global->nr_ids, &global->base_addr);
pr_info("%pfwP: total %d interrupts available\n",
imsic->fwnode, num_possible_cpus() * (global->nr_ids - 1));
--
2.46.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] irqchip/riscv-imsic: Fix output text of base address
2024-09-09 8:56 [PATCH] irqchip/riscv-imsic: Fix output text of base address Andrew Jones
@ 2024-09-09 10:55 ` Anup Patel
2024-10-02 15:43 ` [tip: irq/urgent] " tip-bot2 for Andrew Jones
2024-11-12 22:53 ` [PATCH] " patchwork-bot+linux-riscv
2 siblings, 0 replies; 4+ messages in thread
From: Anup Patel @ 2024-09-09 10:55 UTC (permalink / raw)
To: Andrew Jones; +Cc: linux-riscv, linux-kernel, tglx, paul.walmsley, palmer, aou
On Mon, Sep 9, 2024 at 2:26 PM Andrew Jones <ajones@ventanamicro.com> wrote:
>
> The "per-CPU IDs ... at base ..." info log is outputting a physical
> address, not a PPN.
>
> Fixes: 027e125acdba ("irqchip/riscv-imsic: Add device MSI domain support for platform devices")
> Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
LGTM.
Reviewed-by: Anup Patel <anup@brainfault.org>
Regards,
Anup
> ---
> drivers/irqchip/irq-riscv-imsic-platform.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/irqchip/irq-riscv-imsic-platform.c b/drivers/irqchip/irq-riscv-imsic-platform.c
> index 11723a763c10..c5ec66e0bfd3 100644
> --- a/drivers/irqchip/irq-riscv-imsic-platform.c
> +++ b/drivers/irqchip/irq-riscv-imsic-platform.c
> @@ -340,7 +340,7 @@ int imsic_irqdomain_init(void)
> imsic->fwnode, global->hart_index_bits, global->guest_index_bits);
> pr_info("%pfwP: group-index-bits: %d, group-index-shift: %d\n",
> imsic->fwnode, global->group_index_bits, global->group_index_shift);
> - pr_info("%pfwP: per-CPU IDs %d at base PPN %pa\n",
> + pr_info("%pfwP: per-CPU IDs %d at base address %pa\n",
> imsic->fwnode, global->nr_ids, &global->base_addr);
> pr_info("%pfwP: total %d interrupts available\n",
> imsic->fwnode, num_possible_cpus() * (global->nr_ids - 1));
> --
> 2.46.0
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* [tip: irq/urgent] irqchip/riscv-imsic: Fix output text of base address
2024-09-09 8:56 [PATCH] irqchip/riscv-imsic: Fix output text of base address Andrew Jones
2024-09-09 10:55 ` Anup Patel
@ 2024-10-02 15:43 ` tip-bot2 for Andrew Jones
2024-11-12 22:53 ` [PATCH] " patchwork-bot+linux-riscv
2 siblings, 0 replies; 4+ messages in thread
From: tip-bot2 for Andrew Jones @ 2024-10-02 15:43 UTC (permalink / raw)
To: linux-tip-commits
Cc: Andrew Jones, Thomas Gleixner, Anup Patel, x86, linux-kernel, maz
The following commit has been merged into the irq/urgent branch of tip:
Commit-ID: 4a1361e9a5c5dbb5c9f647762ae0cb1a605101fa
Gitweb: https://git.kernel.org/tip/4a1361e9a5c5dbb5c9f647762ae0cb1a605101fa
Author: Andrew Jones <ajones@ventanamicro.com>
AuthorDate: Mon, 09 Sep 2024 10:56:11 +02:00
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitterDate: Wed, 02 Oct 2024 15:12:18 +02:00
irqchip/riscv-imsic: Fix output text of base address
The "per-CPU IDs ... at base ..." info log is outputting a physical
address, not a PPN.
Fixes: 027e125acdba ("irqchip/riscv-imsic: Add device MSI domain support for platform devices")
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/all/20240909085610.46625-2-ajones@ventanamicro.com
---
drivers/irqchip/irq-riscv-imsic-platform.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-riscv-imsic-platform.c b/drivers/irqchip/irq-riscv-imsic-platform.c
index 64905e6..c708780 100644
--- a/drivers/irqchip/irq-riscv-imsic-platform.c
+++ b/drivers/irqchip/irq-riscv-imsic-platform.c
@@ -341,7 +341,7 @@ int imsic_irqdomain_init(void)
imsic->fwnode, global->hart_index_bits, global->guest_index_bits);
pr_info("%pfwP: group-index-bits: %d, group-index-shift: %d\n",
imsic->fwnode, global->group_index_bits, global->group_index_shift);
- pr_info("%pfwP: per-CPU IDs %d at base PPN %pa\n",
+ pr_info("%pfwP: per-CPU IDs %d at base address %pa\n",
imsic->fwnode, global->nr_ids, &global->base_addr);
pr_info("%pfwP: total %d interrupts available\n",
imsic->fwnode, num_possible_cpus() * (global->nr_ids - 1));
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] irqchip/riscv-imsic: Fix output text of base address
2024-09-09 8:56 [PATCH] irqchip/riscv-imsic: Fix output text of base address Andrew Jones
2024-09-09 10:55 ` Anup Patel
2024-10-02 15:43 ` [tip: irq/urgent] " tip-bot2 for Andrew Jones
@ 2024-11-12 22:53 ` patchwork-bot+linux-riscv
2 siblings, 0 replies; 4+ messages in thread
From: patchwork-bot+linux-riscv @ 2024-11-12 22:53 UTC (permalink / raw)
To: Andrew Jones
Cc: linux-riscv, linux-kernel, anup, tglx, paul.walmsley, palmer, aou
Hello:
This patch was applied to riscv/linux.git (fixes)
by Thomas Gleixner <tglx@linutronix.de>:
On Mon, 9 Sep 2024 10:56:11 +0200 you wrote:
> The "per-CPU IDs ... at base ..." info log is outputting a physical
> address, not a PPN.
>
> Fixes: 027e125acdba ("irqchip/riscv-imsic: Add device MSI domain support for platform devices")
> Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
> ---
> drivers/irqchip/irq-riscv-imsic-platform.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Here is the summary with links:
- irqchip/riscv-imsic: Fix output text of base address
https://git.kernel.org/riscv/c/4a1361e9a5c5
You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html
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2024-09-09 8:56 [PATCH] irqchip/riscv-imsic: Fix output text of base address Andrew Jones
2024-09-09 10:55 ` Anup Patel
2024-10-02 15:43 ` [tip: irq/urgent] " tip-bot2 for Andrew Jones
2024-11-12 22:53 ` [PATCH] " patchwork-bot+linux-riscv
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