[PATCH 0/2] Add missing parent_map to clocks in SM6350 clock drivers

[PATCH 0/2] Add missing parent_map to clocks in SM6350 clock drivers

[Luca Weiss]

If a clk_rcg2 has a parent, it should also have parent_map defined,
otherwise we'll get a NULL pointer dereference when calling clk_set_rate
on those clocks.

Correct this on clocks in both gcc-sm6350 and dispcc-sm6350.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
Luca Weiss (2):
      clk: qcom: gcc-sm6350: Add missing parent_map for two clocks
      clk: qcom: dispcc-sm6350: Add missing parent_map for a clock

 drivers/clk/qcom/dispcc-sm6350.c |  7 +++----
 drivers/clk/qcom/gcc-sm6350.c    | 22 ++++++++++++++--------
 2 files changed, 17 insertions(+), 12 deletions(-)
---
base-commit: 8155b4ef3466f0e289e8fcc9e6e62f3f4dceeac2
change-id: 20241220-sm6350-parent_map-c03e9b61a718

Best regards,
-- 
Luca Weiss <luca.weiss@fairphone.com>

[PATCH 1/2] clk: qcom: gcc-sm6350: Add missing parent_map for two clocks

[Luca Weiss]

If a clk_rcg2 has a parent, it should also have parent_map defined,
otherwise we'll get a NULL pointer dereference when calling clk_set_rate
like the following:

  [    3.388105] Call trace:
  [    3.390664]  qcom_find_src_index+0x3c/0x70 (P)
  [    3.395301]  qcom_find_src_index+0x1c/0x70 (L)
  [    3.399934]  _freq_tbl_determine_rate+0x48/0x100
  [    3.404753]  clk_rcg2_determine_rate+0x1c/0x28
  [    3.409387]  clk_core_determine_round_nolock+0x58/0xe4
  [    3.421414]  clk_core_round_rate_nolock+0x48/0xfc
  [    3.432974]  clk_core_round_rate_nolock+0xd0/0xfc
  [    3.444483]  clk_core_set_rate_nolock+0x8c/0x300
  [    3.455886]  clk_set_rate+0x38/0x14c

Add the parent_map property for two clocks where it's missing and also
un-inline the parent_data as well to keep the matching parent_map and
parent_data together.

Fixes: 131abae905df ("clk: qcom: Add SM6350 GCC driver")
Cc: <stable@vger.kernel.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
 drivers/clk/qcom/gcc-sm6350.c | 22 ++++++++++++++--------
 1 file changed, 14 insertions(+), 8 deletions(-)

diff --git a/drivers/clk/qcom/gcc-sm6350.c b/drivers/clk/qcom/gcc-sm6350.c
index a811fad2aa2785fffbdee0d4bd3cd1133e4d0906..74346dc026068a224e173fdc0472fbaf878052c4 100644
--- a/drivers/clk/qcom/gcc-sm6350.c
+++ b/drivers/clk/qcom/gcc-sm6350.c
@@ -182,6 +182,14 @@ static const struct clk_parent_data gcc_parent_data_2_ao[] = {
 	{ .hw = &gpll0_out_odd.clkr.hw },
 };
 
+static const struct parent_map gcc_parent_map_3[] = {
+	{ P_BI_TCXO, 0 },
+};
+
+static const struct clk_parent_data gcc_parent_data_3[] = {
+	{ .fw_name = "bi_tcxo" },
+};
+
 static const struct parent_map gcc_parent_map_4[] = {
 	{ P_BI_TCXO, 0 },
 	{ P_GPLL0_OUT_MAIN, 1 },
@@ -701,13 +709,12 @@ static struct clk_rcg2 gcc_ufs_phy_phy_aux_clk_src = {
 	.cmd_rcgr = 0x3a0b0,
 	.mnd_width = 0,
 	.hid_width = 5,
+	.parent_map = gcc_parent_map_3,
 	.freq_tbl = ftbl_gcc_ufs_phy_phy_aux_clk_src,
 	.clkr.hw.init = &(struct clk_init_data){
 		.name = "gcc_ufs_phy_phy_aux_clk_src",
-		.parent_data = &(const struct clk_parent_data){
-			.fw_name = "bi_tcxo",
-		},
-		.num_parents = 1,
+		.parent_data = gcc_parent_data_3,
+		.num_parents = ARRAY_SIZE(gcc_parent_data_3),
 		.ops = &clk_rcg2_ops,
 	},
 };
@@ -764,13 +771,12 @@ static struct clk_rcg2 gcc_usb30_prim_mock_utmi_clk_src = {
 	.cmd_rcgr = 0x1a034,
 	.mnd_width = 0,
 	.hid_width = 5,
+	.parent_map = gcc_parent_map_3,
 	.freq_tbl = ftbl_gcc_usb30_prim_mock_utmi_clk_src,
 	.clkr.hw.init = &(struct clk_init_data){
 		.name = "gcc_usb30_prim_mock_utmi_clk_src",
-		.parent_data = &(const struct clk_parent_data){
-			.fw_name = "bi_tcxo",
-		},
-		.num_parents = 1,
+		.parent_data = gcc_parent_data_3,
+		.num_parents = ARRAY_SIZE(gcc_parent_data_3),
 		.ops = &clk_rcg2_ops,
 	},
 };

-- 
2.47.1

[PATCH 2/2] clk: qcom: dispcc-sm6350: Add missing parent_map for a clock

[Luca Weiss]

If a clk_rcg2 has a parent, it should also have parent_map defined,
otherwise we'll get a NULL pointer dereference when calling clk_set_rate
like the following:

  [    3.388105] Call trace:
  [    3.390664]  qcom_find_src_index+0x3c/0x70 (P)
  [    3.395301]  qcom_find_src_index+0x1c/0x70 (L)
  [    3.399934]  _freq_tbl_determine_rate+0x48/0x100
  [    3.404753]  clk_rcg2_determine_rate+0x1c/0x28
  [    3.409387]  clk_core_determine_round_nolock+0x58/0xe4
  [    3.421414]  clk_core_round_rate_nolock+0x48/0xfc
  [    3.432974]  clk_core_round_rate_nolock+0xd0/0xfc
  [    3.444483]  clk_core_set_rate_nolock+0x8c/0x300
  [    3.455886]  clk_set_rate+0x38/0x14c

Add the parent_map property for the clock where it's missing and also
un-inline the parent_data as well to keep the matching parent_map and
parent_data together.

Fixes: 837519775f1d ("clk: qcom: Add display clock controller driver for SM6350")
Cc: <stable@vger.kernel.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
 drivers/clk/qcom/dispcc-sm6350.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/qcom/dispcc-sm6350.c b/drivers/clk/qcom/dispcc-sm6350.c
index 50facb36701af99923584f1ca1549df6a70f06d9..2bc6b5f99f5725bf56c63623c3d5c16c25879d9e 100644
--- a/drivers/clk/qcom/dispcc-sm6350.c
+++ b/drivers/clk/qcom/dispcc-sm6350.c
@@ -187,13 +187,12 @@ static struct clk_rcg2 disp_cc_mdss_dp_aux_clk_src = {
 	.cmd_rcgr = 0x1144,
 	.mnd_width = 0,
 	.hid_width = 5,
+	.parent_map = disp_cc_parent_map_6,
 	.freq_tbl = ftbl_disp_cc_mdss_dp_aux_clk_src,
 	.clkr.hw.init = &(struct clk_init_data){
 		.name = "disp_cc_mdss_dp_aux_clk_src",
-		.parent_data = &(const struct clk_parent_data){
-			.fw_name = "bi_tcxo",
-		},
-		.num_parents = 1,
+		.parent_data = disp_cc_parent_data_6,
+		.num_parents = ARRAY_SIZE(disp_cc_parent_data_6),
 		.ops = &clk_rcg2_ops,
 	},
 };

-- 
2.47.1

Re: [PATCH 1/2] clk: qcom: gcc-sm6350: Add missing parent_map for two clocks

[Konrad Dybcio]

On 20.12.2024 10:03 AM, Luca Weiss wrote:
> If a clk_rcg2 has a parent, it should also have parent_map defined,

                      ^
                        freq_tbl

> otherwise we'll get a NULL pointer dereference when calling clk_set_rate
> like the following:
> 
>   [    3.388105] Call trace:
>   [    3.390664]  qcom_find_src_index+0x3c/0x70 (P)
>   [    3.395301]  qcom_find_src_index+0x1c/0x70 (L)
>   [    3.399934]  _freq_tbl_determine_rate+0x48/0x100
>   [    3.404753]  clk_rcg2_determine_rate+0x1c/0x28
>   [    3.409387]  clk_core_determine_round_nolock+0x58/0xe4
>   [    3.421414]  clk_core_round_rate_nolock+0x48/0xfc
>   [    3.432974]  clk_core_round_rate_nolock+0xd0/0xfc
>   [    3.444483]  clk_core_set_rate_nolock+0x8c/0x300
>   [    3.455886]  clk_set_rate+0x38/0x14c
> 
> Add the parent_map property for two clocks where it's missing and also
> un-inline the parent_data as well to keep the matching parent_map and
> parent_data together.

The patch looks good otherwise

Konrad

Re: [PATCH 2/2] clk: qcom: dispcc-sm6350: Add missing parent_map for a clock

[Konrad Dybcio]

On 20.12.2024 10:03 AM, Luca Weiss wrote:
> If a clk_rcg2 has a parent, it should also have parent_map defined,
> otherwise we'll get a NULL pointer dereference when calling clk_set_rate
> like the following:

Same as patch 1

Konrad

Re: [PATCH 1/2] clk: qcom: gcc-sm6350: Add missing parent_map for two clocks

[Luca Weiss]

On Fri Dec 20, 2024 at 10:42 AM CET, Konrad Dybcio wrote:
> On 20.12.2024 10:03 AM, Luca Weiss wrote:
> > If a clk_rcg2 has a parent, it should also have parent_map defined,
>
>                       ^
>                         freq_tbl

I was basing this on that part of the clk-rcg2.c, so for every parent
there also needs to be a parent_map specified.

    int num_parents = clk_hw_get_num_parents(hw);
    [...]
    for (i = 0; i < num_parents; i++)
        if (cfg == rcg->parent_map[i].cfg)
            [...]

Should I still change the commit message? I guess there's no clk_rcg2
without a parent at all?

I guess I could reword it like that also or something?

  A clk_rcg2 needs to have a parent_map entry for every parent it has,
  otherwise [...]

Regards
Luca

>
> > otherwise we'll get a NULL pointer dereference when calling clk_set_rate
> > like the following:
> > 
> >   [    3.388105] Call trace:
> >   [    3.390664]  qcom_find_src_index+0x3c/0x70 (P)
> >   [    3.395301]  qcom_find_src_index+0x1c/0x70 (L)
> >   [    3.399934]  _freq_tbl_determine_rate+0x48/0x100
> >   [    3.404753]  clk_rcg2_determine_rate+0x1c/0x28
> >   [    3.409387]  clk_core_determine_round_nolock+0x58/0xe4
> >   [    3.421414]  clk_core_round_rate_nolock+0x48/0xfc
> >   [    3.432974]  clk_core_round_rate_nolock+0xd0/0xfc
> >   [    3.444483]  clk_core_set_rate_nolock+0x8c/0x300
> >   [    3.455886]  clk_set_rate+0x38/0x14c
> > 
> > Add the parent_map property for two clocks where it's missing and also
> > un-inline the parent_data as well to keep the matching parent_map and
> > parent_data together.
>
> The patch looks good otherwise
>
> Konrad

Re: [PATCH 1/2] clk: qcom: gcc-sm6350: Add missing parent_map for two clocks

[Konrad Dybcio]

On 20.12.2024 11:21 AM, Luca Weiss wrote:
> On Fri Dec 20, 2024 at 10:42 AM CET, Konrad Dybcio wrote:
>> On 20.12.2024 10:03 AM, Luca Weiss wrote:
>>> If a clk_rcg2 has a parent, it should also have parent_map defined,
>>
>>                       ^
>>                         freq_tbl
> 
> I was basing this on that part of the clk-rcg2.c, so for every parent
> there also needs to be a parent_map specified.
> 
>     int num_parents = clk_hw_get_num_parents(hw);
>     [...]
>     for (i = 0; i < num_parents; i++)
>         if (cfg == rcg->parent_map[i].cfg)
>             [...]
> 
> Should I still change the commit message? I guess there's no clk_rcg2
> without a parent at all?
> 
> I guess I could reword it like that also or something?
> 
>   A clk_rcg2 needs to have a parent_map entry for every parent it has,
>   otherwise [...]
> 
> Regards
> Luca

Okay I suppose it's fine as-is

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Konrad

Re: [PATCH 2/2] clk: qcom: dispcc-sm6350: Add missing parent_map for a clock

[Konrad Dybcio]

On 20.12.2024 10:03 AM, Luca Weiss wrote:
> If a clk_rcg2 has a parent, it should also have parent_map defined,
> otherwise we'll get a NULL pointer dereference when calling clk_set_rate
> like the following:
> 
>   [    3.388105] Call trace:
>   [    3.390664]  qcom_find_src_index+0x3c/0x70 (P)
>   [    3.395301]  qcom_find_src_index+0x1c/0x70 (L)
>   [    3.399934]  _freq_tbl_determine_rate+0x48/0x100
>   [    3.404753]  clk_rcg2_determine_rate+0x1c/0x28
>   [    3.409387]  clk_core_determine_round_nolock+0x58/0xe4
>   [    3.421414]  clk_core_round_rate_nolock+0x48/0xfc
>   [    3.432974]  clk_core_round_rate_nolock+0xd0/0xfc
>   [    3.444483]  clk_core_set_rate_nolock+0x8c/0x300
>   [    3.455886]  clk_set_rate+0x38/0x14c
> 
> Add the parent_map property for the clock where it's missing and also
> un-inline the parent_data as well to keep the matching parent_map and
> parent_data together.
> 
> Fixes: 837519775f1d ("clk: qcom: Add display clock controller driver for SM6350")
> Cc: <stable@vger.kernel.org>
> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
> ---

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Konrad

Re: [PATCH 0/2] Add missing parent_map to clocks in SM6350 clock drivers

[Bjorn Andersson]

On Fri, 20 Dec 2024 10:03:29 +0100, Luca Weiss wrote:
> If a clk_rcg2 has a parent, it should also have parent_map defined,
> otherwise we'll get a NULL pointer dereference when calling clk_set_rate
> on those clocks.
> 
> Correct this on clocks in both gcc-sm6350 and dispcc-sm6350.
> 
> 
> [...]

Applied, thanks!

[1/2] clk: qcom: gcc-sm6350: Add missing parent_map for two clocks
      commit: 96fe1a7ee477d701cfc98ab9d3c730c35d966861
[2/2] clk: qcom: dispcc-sm6350: Add missing parent_map for a clock
      commit: d4cdb196f182d2fbe336c968228be00d8c3fed05

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>