From: patchwork-bot+linux-riscv@kernel.org
To: Maxim Kiselev <bigunclemax@gmail.com>
Cc: linux-riscv@lists.infradead.org, drew@pdp7.com,
guoren@kernel.org, wefu@redhat.com, mturquette@baylibre.com,
sboyd@kernel.org, frank.li@vivo.com, jszhang@kernel.org,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] clk: thead: Fix TH1520 emmc and shdci clock rate
Date: Mon, 03 Feb 2025 19:16:03 +0000 [thread overview]
Message-ID: <173861016376.3409359.6278098615754721919.git-patchwork-notify@kernel.org> (raw)
In-Reply-To: <20241210083029.92620-1-bigunclemax@gmail.com>
Hello:
This patch was applied to riscv/linux.git (fixes)
by Stephen Boyd <sboyd@kernel.org>:
On Tue, 10 Dec 2024 11:30:27 +0300 you wrote:
> From: Maksim Kiselev <bigunclemax@gmail.com>
>
> In accordance with LicheePi 4A BSP the clock that comes to emmc/sdhci
> is 198Mhz which is got through frequency division of source clock
> VIDEO PLL by 4 [1].
>
> But now the AP_SUBSYS driver sets the CLK EMMC SDIO to the same
> frequency as the VIDEO PLL, equal to 792 MHz. This causes emmc/sdhci
> to work 4 times slower.
>
> [...]
Here is the summary with links:
- [v2] clk: thead: Fix TH1520 emmc and shdci clock rate
https://git.kernel.org/riscv/c/f4bf0b909a6b
You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
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prev parent reply other threads:[~2025-02-03 19:15 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-10 8:30 [PATCH v2] clk: thead: Fix TH1520 emmc and shdci clock rate bigunclemax
2024-12-10 10:07 ` Xi Ruoyao
2024-12-11 16:59 ` Drew Fustini
2024-12-17 20:18 ` Stephen Boyd
2025-02-03 19:16 ` patchwork-bot+linux-riscv [this message]
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