[tip: irq/cleanups] Documentation: irq/concepts: Minor improvements

tip-bot2 for Jiri Slaby (SUSE)
2025-05-07T13:44:07Z

Commit-ID: 809997b2b2d14b762e24829a0ce63a4a75e6185b
Gitweb: https://git.kernel.org/tip/809997b2b2d14b762e24829a0ce63a4a75e6185b
Author: Jiri Slaby (SUSE) <jirislaby@kernel.org>
AuthorDate: Wed, 19 Mar 2025 10:29:47 +01:00
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitterDate: Wed, 07 May 2025 15:39:42 +02:00

Documentation: irq/concepts: Minor improvements

Just note in the docs:

1) A PCI device as an example for shared interrupts
2) A sparse tree can be used for interrupts too
3) i8259s which have 8 pins

[ tglx: Fix up subject prefix ]

Signed-off-by: Jiri Slaby (SUSE) <jirislaby@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/all/20250319092951.37667-55-jirislaby@kernel.org

---
Documentation/core-api/irq/concepts.rst | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/Documentation/core-api/irq/concepts.rst b/Documentation/core-api/irq/concepts.rst
index f166006..7c4564f 100644
--- a/Documentation/core-api/irq/concepts.rst
+++ b/Documentation/core-api/irq/concepts.rst
@@ -4,18 +4,20 @@ What is an IRQ?

An IRQ is an interrupt request from a device. Currently, they can come
in over a pin, or over a packet. Several devices may be connected to
-the same pin thus sharing an IRQ.
+the same pin thus sharing an IRQ. Such as on legacy PCI bus: All devices
+typically share 4 lanes/pins. Note that each device can request an
+interrupt on each of the lanes.

An IRQ number is a kernel identifier used to talk about a hardware
interrupt source. Typically, this is an index into the global irq_desc
-array, but except for what linux/interrupt.h implements, the details
-are architecture specific.
+array or sparse_irqs tree. But except for what linux/interrupt.h
+implements, the details are architecture specific.

An IRQ number is an enumeration of the possible interrupt sources on a
machine. Typically, what is enumerated is the number of input pins on
all of the interrupt controllers in the system. In the case of ISA,
-what is enumerated are the 16 input pins on the two i8259 interrupt
-controllers.
+what is enumerated are the 8 input pins on each of the two i8259
+interrupt controllers.

Architectures can assign additional meaning to the IRQ numbers, and
are encouraged to in the case where there is any manual configuration