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From: Heiko Stuebner <heiko@sntech.de>
To: Neil Armstrong <neil.armstrong@linaro.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>, Vinod Koul <vkoul@kernel.org>,
	Kishon Vijay Abraham I <kishon@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Jagan Teki <jagan@amarulasolutions.com>,
	Sebastian Reichel <sebastian.reichel@collabora.com>,
	Collabora Kernel Team <kernel@collabora.com>,
	Michael Riesch <michael.riesch@collabora.com>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-phy@lists.infradead.org
Subject: Re: [PATCH 2/5] dt-bindings: phy: rockchip-inno-csi-dphy: add rk3588 variant
Date: Thu, 19 Jun 2025 22:11:49 +0200	[thread overview]
Message-ID: <17533727.geO5KgaWL5@phil> (raw)
In-Reply-To: <8ba2f458-4a66-44f6-8528-4654cfe379ff@collabora.com>

Am Mittwoch, 18. Juni 2025, 08:32:25 Mitteleuropäische Sommerzeit schrieb Michael Riesch:
> Hi Neil,
> 
> Thanks for your comments!
> 
> On 6/17/25 11:31, neil.armstrong@linaro.org wrote:
> > On 17/06/2025 10:54, Michael Riesch via B4 Relay wrote:
> >> From: Michael Riesch <michael.riesch@collabora.com>
> >>
> >> The Rockchip RK3588 variant of the CSI-2 DPHY features two reset lines.
> >> Add the variant and allow for the additional reset.
> > 
> > No names for the new resets on the RK3588 ?
> 
> I left the names away because TBH I don't see the value in them (in that
> case).
> 
> Downstream uses reset-names = "srst_csiphy0", "srst_p_csiphy0"; and
> there is no better description. One could guess that the second reset
> corresponds to "apb" but this is just guessing and we would still have
> to guess/find a proper name for the first reset.
> 
> Amazingly the mainline driver does not seem to do anything with the
> resets (unless I overlooked some implicit magic). Downstream does a
> simple reset_control_{assert,deassert} before configuring the PHY. Now
> if the different resets are handled in bulk mode, does it really make
> sense to address each reset individually?

it might not make sense now, but possibly in the future?

A binding and the attached devicetrees are meant to be "forever", i.e. a
new kernel _should_ support all those old devicetrees you throw at it - 
if they conform to (at some time) established bindings.

So while all drivers might not need the specific resets now, you don't
know what quirks you'll have discovered in two years ;-)

And instead of trying to update the binding and then carrying both the
new and the fallback code for the old binding around, why not do it now.

Then when you find a need for a specific reset, things magically just work.


Heiko



  reply	other threads:[~2025-06-19 20:11 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-17  8:54 [PATCH 0/5] phy: rockchip: phy-rockchip-inno-csidphy: add support for rk3588 variant Michael Riesch via B4 Relay
2025-06-17  8:54 ` [PATCH 1/5] dt-bindings: soc: rockchip: add rk3588 csidphy grf syscon Michael Riesch via B4 Relay
2025-06-27 19:14   ` Rob Herring (Arm)
2025-06-17  8:54 ` [PATCH 2/5] dt-bindings: phy: rockchip-inno-csi-dphy: add rk3588 variant Michael Riesch via B4 Relay
2025-06-17  9:31   ` neil.armstrong
2025-06-18  6:32     ` Michael Riesch
2025-06-19 20:11       ` Heiko Stuebner [this message]
2025-06-17 14:12   ` Diederik de Haas
2025-06-18  7:45     ` Michael Riesch
2025-06-27 19:17       ` Rob Herring
2025-06-17  8:54 ` [PATCH 3/5] phy: rockchip: phy-rockchip-inno-csidphy: allow writes to grf register 0 Michael Riesch via B4 Relay
2025-06-17  9:30   ` neil.armstrong
2025-06-17  8:54 ` [PATCH 4/5] phy: rockchip: phy-rockchip-inno-csidphy: add support for rk3588 variant Michael Riesch via B4 Relay
2025-06-17  9:36   ` neil.armstrong
2025-06-17  8:54 ` [PATCH 5/5] arm64: dts: rockchip: add mipi csi-2 dphy nodes to rk3588 Michael Riesch via B4 Relay

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