From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7184135FF51 for ; Wed, 19 Nov 2025 12:30:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763555454; cv=none; b=Gq1mZy0dGUPRU0GmEEeySKKZoe9Wlh2sUI/W8NgwMWxlprndQYvXvZpPNPuT+/RWHIO0rIM3a6EQ9Kau/2aBN8onG19P0FVH5nFzkrsZLPT87AfOyzDW2pCks9OqWIOBCk9FgO9znrehCjNLWeY2q6ArsWroVw8PczyfIp2XkO0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763555454; c=relaxed/simple; bh=T+uuXoZYcmTf+MuDvFOO70O2O5xbNfTyuRzJxZQG9cQ=; h=Content-Type:MIME-Version:Subject:From:Message-Id:Date:References: In-Reply-To:To:Cc; b=uthoxkSSmjbnkzvkWB1LWJQT6eOku52PSI18SJCxh0PhYcDbr10zHyklbgJ7RrbrvwEeRdxWes9nN9aIbpeR+7HaRG23wgCJVR4hq2QrQyVtqPQ1V2ehlgnP1c1/yfSFWCNpyO/VlUqLLI5CeoUrsvtRoh4s0WKbbEftqOJBXd8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=avXEy9sB; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="avXEy9sB" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9258EC4AF62; Wed, 19 Nov 2025 12:30:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1763555452; bh=T+uuXoZYcmTf+MuDvFOO70O2O5xbNfTyuRzJxZQG9cQ=; h=Subject:From:Date:References:In-Reply-To:To:Cc:From; b=avXEy9sBvfTHQYZ31wm48f6V6vM8KArF63yBBl3JIG2MB5vtBrhKNrmpM49so2AMt Ou8fivgKvK5b/arnHJIVVcUe0iVtiE0z35QRVMKmiUKI2jaQR3p+pI3QCFDb1PFyex FcqEdPMgT5SO/wBu5wKbDFEMxwJCLoIDaNq+xg9AbT46pL7CMjw+HZcwYqBCIrgEK3 fkgJtA4b1NFMmkjbZMdRCdXFWTjPpElJHDonl9//3Rau8uf44aylDBsft4JbcNRxNc NsPE9ykUO15Ng2GtsmItQGwNaEYqDJ5620TwFmItmlP7S1Vqel9mJiLAsCVeL5Y2DG VM/HkBOmP569g== Received: from [10.30.226.235] (localhost [IPv6:::1]) by aws-us-west-2-korg-oddjob-rhel9-1.codeaurora.org (Postfix) with ESMTP id 33DC3380AA40; Wed, 19 Nov 2025 12:30:19 +0000 (UTC) Content-Type: text/plain; charset="utf-8" Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: Re: [PATCH v8 0/5] riscv: add support for SBI Supervisor Software Events From: patchwork-bot+linux-riscv@kernel.org Message-Id: <176355541775.758643.18140349571928540394.git-patchwork-notify@kernel.org> Date: Wed, 19 Nov 2025 12:30:17 +0000 References: <20251105082639.342973-1-cleger@rivosinc.com> In-Reply-To: <20251105082639.342973-1-cleger@rivosinc.com> To: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2VyIDxjbGVnZXJAcml2b3NpbmMuY29tPg==?=@aws-us-west-2-korg-oddjob-rhel9-1.codeaurora.org Cc: linux-riscv@lists.infradead.org, paul.walmsley@sifive.com, palmer@dabbelt.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, hchauhan@ventanamicro.com, apatel@ventanamicro.com, luxu.kernel@bytedance.com, atishp@atishpatra.org, bjorn@rivosinc.com, cuiyunhui@bytedance.com Hello: This series was applied to riscv/linux.git (for-next) by Paul Walmsley : On Wed, 5 Nov 2025 08:26:32 +0000 you wrote: > The SBI Supervisor Software Events (SSE) extensions provides a mechanism > to inject software events from an SBI implementation to supervisor > software such that it preempts all other supervisor level traps and > interrupts. This extension is introduced by the SBI v3.0 specification[1]. > > Various events are defined and can be send asynchronously to supervisor > software (RAS, PMU, DEBUG, Asynchronous page fault) from SBI as well > as platform specific events. Events can be either local (per-hart) or > global. Events can be nested on top of each other based on priority and > can interrupt the kernel at any time. > > [...] Here is the summary with links: - [v8,1/5] riscv: add SBI SSE extension definitions https://git.kernel.org/riscv/c/7bba38249b8a - [v8,2/5] riscv: add support for SBI Supervisor Software Events extension https://git.kernel.org/riscv/c/b52179e6de7d - [v8,3/5] drivers: firmware: add riscv SSE support https://git.kernel.org/riscv/c/5ffe60d26107 - [v8,4/5] perf: RISC-V: add support for SSE event https://git.kernel.org/riscv/c/c6f3f04d2a9c - [v8,5/5] selftests/riscv: add SSE test module https://git.kernel.org/riscv/c/a123316660af You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html